Patents by Inventor Hsiao-Te Chang
Hsiao-Te Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9239685Abstract: A method for accessing a memory includes: utilizing a Flash memory to perform a plurality of sensing operations with a plurality of different sensing voltages respectively corresponding to the plurality of sensing operations; according to the plurality of sensing operations, generating a first digital value of a Flash cell of the Flash memory; according to the plurality of sensing operations and the first digital value, generating at least a second digital value of the Flash cell; and obtaining soft information of the Flash cell according to the second digital value. The first digital value and the second digital value are used for determining information of a same bit stored in the Flash cell, a number of possible bit(s) of the Flash cell directly corresponds to a number of possible states of the Flash cell, and the obtained soft information is used for performing soft decoding.Type: GrantFiled: July 10, 2014Date of Patent: January 19, 2016Assignee: Silicon Motion Inc.Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang
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Publication number: 20140321203Abstract: A method for accessing a memory includes: utilizing a Flash memory to perform a plurality of sensing operations with a plurality of different sensing voltages respectively corresponding to the plurality of sensing operations; according to the plurality of sensing operations, generating a first digital value of a Flash cell of the Flash memory; according to the plurality of sensing operations and the first digital value, generating at least a second digital value of the Flash cell; and obtaining soft information of the Flash cell according to the second digital value. The first digital value and the second digital value are used for determining information of a same bit stored in the Flash cell, a number of possible bit(s) of the Flash cell directly corresponds to a number of possible states of the Flash cell, and the obtained soft information is used for performing soft decoding.Type: ApplicationFiled: July 10, 2014Publication date: October 30, 2014Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang
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Patent number: 8867270Abstract: A method for performing memory access management includes: with regard to a same Flash cell of a Flash memory, receiving a first digital value outputted by the Flash memory, requesting the Flash memory to output at least one second digital value, wherein the first digital value and the at least one second digital value are utilized for determining information of a same bit stored in the Flash cell, and a number of various possible states of the Flash cell correspond to a possible number of bit(s) stored in the Flash cell; based upon the second digital value, generating/obtaining soft information of the Flash cell, for use of performing soft decoding; and controlling the Flash memory to perform sensing operations by respectively utilizing a plurality of sensing voltages that are not all the same, in order to generate the first digital value and the second digital value.Type: GrantFiled: July 17, 2013Date of Patent: October 21, 2014Assignee: Silicon Motion Inc.Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang
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Patent number: 8756366Abstract: A method for operating a non-volatile memory is provided. The non-volatile memory includes a plurality of physical blocks having a plurality of data blocks and spare blocks. An index is obtained by comparing an average erase count of selected physical blocks with a first threshold. Each erase count for each physical block is the total number of the erase operations performed thereon. A performance capability status for the memory is determined according to the index. The performance capability status is set to a first status when the average erase count exceeds the first threshold. An indication is generated based on the performance capability status. A limp function is performed in response to the first status for configuring a minimum number of the at least some spare blocks reserved and used for data update operations.Type: GrantFiled: September 13, 2012Date of Patent: June 17, 2014Assignee: Silicon Motion, Inc.Inventors: Jieh-Hsin Chien, Hsiao-Te Chang
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Publication number: 20130339584Abstract: The present invention provides a method for accessing a flash memory, where a block of the flash memory includes pages whose quantity is (2N+M), N and M are positive integers. The method includes: writing a data stream into 1st-(2N)th pages, and backing up data of a portion of the 1st-(2N)th pages into (2N+1)th-(2N+M)th pages.Type: ApplicationFiled: June 17, 2013Publication date: December 19, 2013Inventors: Hsiao-Te Chang, Chun-Yi Chen
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Publication number: 20130326125Abstract: A data access method for flash memory includes: receiving a first data from a host terminal by utilizing a flash memory controller; transmitting and writing the first data into a single-level cell of the flash memory form the flash memory controller; and when the flash memory controller receives a second data from the host terminal, utilizing the flash memory controller to execute a copy back program to merge at least a portion of the first data stored in the single-level cell into a multi-level cell.Type: ApplicationFiled: June 4, 2013Publication date: December 5, 2013Inventors: Hsiao-Te Chang, Chun-Yi Chen
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Publication number: 20130304977Abstract: A method for performing memory access management includes: with regard to a same Flash cell of a Flash memory, receiving a first digital value outputted by the Flash memory, requesting the Flash memory to output at least one second digital value, wherein the first digital value and the at least one second digital value are utilized for determining information of a same bit stored in the Flash cell, and a number of various possible states of the Flash cell correspond to a possible number of bit(s) stored in the Flash cell; based upon the second digital value, generating/obtaining soft information of the Flash cell, for use of performing soft decoding; and controlling the Flash memory to perform sensing operations by respectively utilizing a plurality of sensing voltages that are not all the same, in order to generate the first digital value and the second digital value.Type: ApplicationFiled: July 17, 2013Publication date: November 14, 2013Applicant: Silicon Motion Inc.Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang
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Patent number: 8508991Abstract: A method for performing memory access management includes: with regard to a same memory cell of a memory, according to a first digital value output by the memory, requesting the memory to output at least one second digital value, wherein the first digital value and the at least one second digital value are utilized for determining information of a same bit stored in the memory cell, and a number of various possible states of the memory cell is equal to a number of various possible combinations of all bit(s) stored in the memory cell; and based upon the at least one second digital value, generating/obtaining soft information of the memory cell, for use of performing soft decoding. An associated memory device and a controller thereof are also provided.Type: GrantFiled: April 19, 2011Date of Patent: August 13, 2013Assignee: Silicon Motion Inc.Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang
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Patent number: 8402204Abstract: A data storage system comprises a host and a flash memory device having a non-non-volatile memory. A controller of the flash memory device calculates an average erase count of the flash memory to obtaining a remaining period of time indicating usable lifespan of the flash memory device. The host obtains an index by comparing the average erase count with a first threshold and determines a performance capability status for the flash memory device. The performance capability status is set to a first status when the average erase count exceeds the first threshold. The host generates an indication based on the performance capability status and performs a limp function responsive to the first status. The limp function loads a predetermined in-system programming code for replacing an original one to configure a minimum number of at least some spare blocks of the flash memory reserved and used for data update operations.Type: GrantFiled: March 7, 2010Date of Patent: March 19, 2013Assignee: Silicon Motion, Inc.Inventors: De-Wei Lai, Jen-Hung Liao, Hsiao-Te Chang
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Publication number: 20130024610Abstract: A method for operating a non-volatile memory is provided. The non-volatile memory includes a plurality of physical blocks having a plurality of data blocks and spare blocks. An index is obtained by comparing an average erase count of selected physical blocks with a first threshold. Each erase count for each physical block is the total number of the erase operations performed thereon. A performance capability status for the memory is determined according to the index. The performance capability status is set to a first status when the average erase count exceeds the first threshold. An indication is generated based on the performance capability status. A limp function is performed in response to the first status for configuring a minimum number of the at least some spare blocks reserved and used for data update operations.Type: ApplicationFiled: September 13, 2012Publication date: January 24, 2013Applicant: SILICON MOTION, INC.Inventors: Jieh-Hsin Chien, Hsiao-Te Chang
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Patent number: 8335885Abstract: A storage device and a method of accessing a status thereof are provided. The storage device is disposed in a host. The device data structure field of the storage device is adapted to record the status of the non-volatile memory. The control module is adapted to access the status according to a control signal from the host. Therefore, the operating system or the application of the host is capable of getting the status of the non-volatile memory to ensure the safety of the stored data.Type: GrantFiled: April 15, 2008Date of Patent: December 18, 2012Assignee: Silicon Motion, Inc.Inventors: Hung-Wei Lin, Hsiao-Te Chang
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Patent number: 8291152Abstract: A method for operating a non-volatile memory is provided. The non-volatile memory includes a plurality of physical blocks having a plurality of data blocks and spare blocks. An index is obtained by comparing an average erase count of selected physical blocks with a first threshold. Each erase count for each physical block is the total number of the erase operations performed thereon. A performance capability status for the memory is determined according to the index. The performance capability status is set to a first status when the average erase count exceeds the first threshold. An indication is generated based on the performance capability status. A limp function is performed in response to the first status for configuring a minimum number of the at least some spare blocks reserved and used for data update operations.Type: GrantFiled: May 3, 2009Date of Patent: October 16, 2012Assignee: Silicon Motion, Inc.Inventors: Jieh-Hsin Chien, Hsiao-Te Chang
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Publication number: 20110258371Abstract: A method for performing memory access management includes: with regard to a same memory cell of a memory, according to a first digital value output by the memory, requesting the memory to output at least one second digital value, wherein the first digital value and the at least one second digital value are utilized for determining information of a same bit stored in the memory cell, and a number of various possible states of the memory cell is equal to a number of various possible combinations of all bit(s) stored in the memory cell; and based upon the at least one second digital value, generating/obtaining soft information of the memory cell, for use of performing soft decoding. An associated memory device and a controller thereof are also provided.Type: ApplicationFiled: April 19, 2011Publication date: October 20, 2011Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang
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Publication number: 20110119430Abstract: A data storage system comprises a host and a flash memory device having a non-non-volatile memory. A controller of the flash memory device calculates an average erase count of the flash memory to obtaining a remaining period of time indicating usable lifespan of the flash memory device. The host obtains an index by comparing the average erase count with a first threshold and determines a performance capability status for the flash memory device. The performance capability status is set to a first status when the average erase count exceeds the first threshold. The host generates an indication based on the performance capability status and performs a limp function responsive to the first status. The limp function loads a predetermined in-system programming code for replacing an original one to configure a minimum number of at least some spare blocks of the flash memory reserved and used for data update operations.Type: ApplicationFiled: March 7, 2010Publication date: May 19, 2011Applicant: SILICON MOTION, INC.Inventors: De-Wei Lai, Jen-Hung Liao, Hsiao-Te Chang
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Patent number: 7908423Abstract: A flash memory controller for averagely using blocks of a flash memory and the method thereof are provided. The flash memory controller is configured to process wear-leveling by allocating frequently updated data in less-erased blocks, and, allocating less-updated data in frequently erased blocks to achieve dynamic uniformity of times of erasion of blocks.Type: GrantFiled: January 11, 2008Date of Patent: March 15, 2011Assignee: Silicon Motion, Inc.Inventors: Hung-Jung Hsu, Hsiao-Te Chang
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Publication number: 20100174852Abstract: A method for operating a non-volatile memory is provided. The non-volatile memory includes a plurality of physical blocks haing a plurality of data blocks and spare blocks. An index is obtained by comparing an average erase count of selected physical blocks with a first threshold. Each erase count for each physical block is the total number of the erase operations performed thereon. A performance capability status for the memory is determined according to the index. The performance capability status is set to a first status when the average erase count exceeds the first threshold. An indication is generated based on the performance capability status. A limp function is performed in response to the first status for configuring a minimum number of the at least some spare blocks reserved and used for data update operations.Type: ApplicationFiled: May 3, 2009Publication date: July 8, 2010Applicant: Silicon Motion, Inc.Inventors: Jieh-Hsin CHIEN, Hsiao-Te Chang
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Publication number: 20090119448Abstract: A flash memory controller for averagely using blocks of a flash memory and the method thereof are provided. The flash memory controller is configured to process wear-leveling by allocating frequently updated data in less-erased blocks, and, allocating less-updated data in frequently erased blocks to achieve dynamic uniformity of times of erasion of blocks.Type: ApplicationFiled: January 11, 2008Publication date: May 7, 2009Applicant: SILICON MOTION, INC.Inventors: Hung-Jung Hsu, Hsiao-Te Chang
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Publication number: 20090106519Abstract: A storage device and a method of accessing a status thereof are provided. The storage device is disposed in a host. The device data structure field of the storage device is adapted to record the status of the non-volatile memory. The control module is adapted to access the status according to a control signal from the host. Therefore, the operating system or the application of the host is capable of getting the status of the non-volatile memory to ensure the safety of the stored data.Type: ApplicationFiled: April 15, 2008Publication date: April 23, 2009Applicant: SILICON MOTION, INC.Inventors: Hung-Wei Lin, Hsiao-Te Chang
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Patent number: 6898653Abstract: A plug-and-play(PnP) interconnection architecture and method with an in-device storage module in a peripheral device are proposed for interconnecting a peripheral device with a host computer unit. The proposed architecture is characterized by integration of an in-device storage unit with internal functional modules of the peripheral device for storing device specific data and software such as the dedicated device driver of the peripheral device. An enhanced plug-and-play (ePnP) layered structure is proposed based on the in-device storage architecture. The ePnP provides a mechanism to PnP peripheral devices' functions customization. An application of the ePnP is the mechanism to bring up the device driver automatically when the peripheral device is connected to the host computer unit. This auto-installation mechanism provides a truly plug-and-play capability to the user.Type: GrantFiled: December 30, 2002Date of Patent: May 24, 2005Assignee: Neodio Technologies CorporationInventors: Shih Chieh Su, Jia Lung Wang, Chih-Lung Lin, Hsiao-Te Chang
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Publication number: 20040128420Abstract: A plug-and-play(PnP) interconnection architecture and method with an in-device storage module in a peripheral device are proposed for interconnecting a peripheral device with a host computer unit. The proposed architecture is characterized by integration of an in-device storage unit with internal functional modules of the peripheral device for storing device specific data and software such as the dedicated device driver of the peripheral device. An enhanced plug-and-play (ePnP) layered structure is proposed based on the in-device storage architecture. The ePnP provides a mechanism to PnP peripheral devices' functions customization. An application of the ePnP is the mechanism to bring up the device driver automatically when the peripheral device is connected to the host computer unit. This auto-installation mechanism provides a truly plug-and-play capability to the user.Type: ApplicationFiled: December 30, 2002Publication date: July 1, 2004Applicant: NEODIO TECHNOLOGIES CORPORATIONInventors: Shih Chieh Su, Jia Lung Wang, Chih-Lung Lin, Hsiao Te Chang