Patents by Inventor Hsiao-Ting Wu

Hsiao-Ting Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11997227
    Abstract: An electronic device including a casing, a circuit board, a bracket, an antenna, and a protective member is provided. The casing has an accommodating space and a hole communicating with the accommodating space. The circuit board is disposed in the accommodating space. The bracket is disposed above the circuit board, and at least part of the bracket is located in the accommodating space and the hole. At least part of the antenna is disposed on a portion of the bracket extending out of the accommodating space. The protective member is disposed on at least one surface of the casing and covers the hole, the bracket, and the antenna.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: May 28, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Chin-Ting Huang, Hsiao-Wen Wu
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20150206789
    Abstract: The present disclosure relates to a method of modifying a polysilicon layer, which includes the following steps. A polysilicon layer is provided. Nitrogen is incorporated into the polysilicon layer toward a predetermined depth. The polysilicon layer incorporated with nitrogen is etched, wherein after the nitrogenized polysilicon is removed, the formation of the remaining polysilicon layer is nearly indistinguishable from the formation of the polysilicon layer.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 23, 2015
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: JONATHAN PAPPAS, GIORGIO MARIOTTINI, DARWIN FAN, HSIAO TING WU, CHENG SHUN CHEN
  • Patent number: 7952127
    Abstract: A storage node structure includes a substrate having thereon a conductive block region; an etching stop layer covering the conductive block region; a conductive layer penetrating the etching stop layer and electrically connecting the conductive block region; an annular shaped conductive spacer on sidewall of the conductive layer, wherein the annular shaped conductive spacer is disposed on the etching stop layer and wherein the annular shaped conductive spacer and the conductive layer constitute a storage node pedestal; and an upper node portion stacked on the storage node pedestal.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: May 31, 2011
    Assignee: Nanya Technology Corp.
    Inventor: Hsiao-Ting Wu
  • Publication number: 20100102374
    Abstract: A storage node structure includes a substrate having thereon a conductive block region; an etching stop layer covering the conductive block region; a conductive layer penetrating the etching stop layer and electrically connecting the conductive block region; an annular shaped conductive spacer on sidewall of the conductive layer, wherein the annular shaped conductive spacer is disposed on the etching stop layer and wherein the annular shaped conductive spacer and the conductive layer constitute a storage node pedestal; and an upper node portion stacked on the storage node pedestal.
    Type: Application
    Filed: December 31, 2008
    Publication date: April 29, 2010
    Inventor: Hsiao-Ting Wu