Abstract: Certain aspects of the present disclosure provide an amplifier. The amplifier generally includes: an active path coupled between an input node of the amplifier and an output node of the amplifier, wherein the active path comprises a first transistor coupled to the input node of the amplifier and a first inductive element coupled between the first transistor and the output node; and a bypass path coupled between the input node of the amplifier and the output node of the amplifier, the bypass path also comprising the first inductive element.

Abstract: A radio frequency apparatus includes a power amplifier circuit, a signal coupling circuit, an extraction circuit, and a harmonic filter circuit. The power amplifier circuit is configured to amplify a differential signal to output a to-be-filtered signal. The signal coupling circuit includes a primary side inductor and a secondary side inductor. The signal coupling circuit is configured to convert the to-be-filtered signal received by the primary side inductor into a single-ended signal outputted from the secondary side inductor. The extraction circuit has a center tap. The extraction circuit is configured to inductively couple to the primary side inductor and output a common mode signal from the center tap. The harmonic filter circuit is configured to perform a harmonic filtering on the single-ended signal according to the common mode signal, such that the secondary side inductor of the signal coupling circuit outputs a filtered signal.

Abstract: A transformer device includes a first and a second trace, a first and a second connection member, and a first input/output member. A second sub-trace of the first trace is coupled to a first sub-trace of the first trace at a first and a second area. The first connection member is coupled to the first and the second sub-trace. The first and a third sub-trace of the second trace are disposed in turn. A fourth sub-trace of the second trace is coupled to the third sub-trace at the first and the second area. The second and the fourth sub-trace are disposed in turn. The second connection member is coupled to the third and the fourth sub-trace. The first sub-trace includes first wires, and the first input/output member is coupled to the first wire which is located at an inner side among the first wires.

Abstract: A low-noise amplifier (LNA) includes a first transistor, a first source inductor coupled to a source of the first transistor, and a second transistor, wherein a source of the second transistor is coupled to a drain of the first transistor, a gate of the second transistor is coupled to a bias circuit, and a drain of the second transistor is coupled to an output of the LNA. The LNA also includes an output inductor coupled between a supply rail and the output of the LNA, wherein the output inductor is magnetically coupled with the first source inductor.

Abstract: An inductor device includes a first wire, a second wire, and a third wire. The first wire includes a plurality of first sub-wires. The second wire includes a plurality of second sub-wires. The sequence of the first sub-wires and the second sub-wires is that at least two first sub-wires of the first sub-wires and at least one second sub-wires of the second sub-wires are disposed to each other in an interlaced manner. The third wire is disposed adjacent to at least two first sub-wires of the first sub-wires.

Abstract: An inductor structure includes a first connecting component, a second connecting component, and a center-tap terminal. In the inductor structure, a first port of the first connecting component is coupled to a first wire, and a second port of the first connecting component is coupled to a second wire. The second connecting component disposed above or beneath the first connecting component in an interlaced manner. The center-tap terminal is coupled to one of the first connecting component and the second connecting component. The center-tap terminal is disposed on a layer that is different from the layer where the first connecting component is disposed or the layer where the second connecting component is disposed.

Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes a first and a second sub-trace. The first sub-trace includes first wires, and the second sub-trace includes second wires. The second sub-trace is coupled to the first sub-trace at a first node. The first and the second wires are disposed to each other in an interlaced manner, and located at an outer side of the inductor device. The second trace includes a third and a fourth sub-trace. The third sub-trace includes third wires, and the fourth sub-trace includes fourth wires. The fourth sub-trace is coupled to the third sub-trace at a second node. The third and the fourth wires are disposed to each other in an interlaced manner, and located at an outer side of the inductor device. The capacitor is coupled between the first and the second node.

Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes a first sub-trace and a second sub-trace. The first sub-trace and the second sub-trace form a plurality of first wires together at a first side of the inductor device, and form a plurality of second wires together at a second side of the inductor device. The second sub-trace is coupled to one terminal of the first sub-trace at a first node. The third sub-trace and the fourth sub-trace form a plurality of third wires together at the first side of the inductor device, and form a plurality of fourth wires together at the second side of the inductor device. The fourth sub-trace is coupled to one terminal of the third sub-trace at a second node. The capacitor is coupled to the first node and the second node.

Abstract: An inductor device includes a first wire, a second wire, a third wire, a fourth wire and an 8-shaped inductor structure. The first wire is disposed in a first area. The second wire is disposed in a second area. The third wire is disposed in the first area and at least partially overlapped with the first wire in a vertical direction. The third wire includes at least two third sub-wires, and the at least two third sub-wires are arranged with an interval between each other. The fourth wire is at least partially overlapped with the second wire in the vertical direction. The fourth wire includes at least two fourth sub-wires, and the at least two fourth sub-wires are arranged with an interval between each other. The eight-shaped inductor structure is disposed on an outer side of the third wire and the fourth wire.

Abstract: A transformer device includes a first coil, a second coil, and a third coil. The first coil includes a first ring structure, a second ring structure, a first connecting portion, and a first terminal, in which the first terminal is arranged on the first connecting portion and is located at a central location between the first ring structure and the second ring structure, the first terminal is connected to the first ring structure through the first connecting portion in a first direction, and connected to the second ring structure through the first connecting portion in a second direction, and the first direction is the opposite of the second direction. The second coil is configured to couple the first ring structure. The third coil is configured to couple the second ring structure, in which the second coil and the third coil have the same structure.

Abstract: An inductor device includes a first coil, a second coil and a toroidal coil. The first coil is partially overlapped with the second coil in a vertical direction. The toroidal coil is disposed outside the first coil and the second coil. The first coil is interlaced with the second coil at a first side and a second side of the inductor device.

Abstract: Semiconductor devices and methods of formation are provided herein. A semiconductor device includes a first inductor, a patterned ground shielding (PGS) proximate the first inductor comprising one or more portions and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. The semiconductor device also has a configuration including a first inductor on a first side of the PGS, a second inductor on a second side of the PGS and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. Selective coupling of portions of the PGS by activating or deactivating switches alters the behavior of the first inductor, or the behavior and interaction between the first inductor and the second inductor. A mechanism is thus provided for selectively configuring a PGS to control inductive or other properties of a circuit.

Abstract: Semiconductor devices and methods of formation are provided herein. A semiconductor device includes a first inductor, a patterned ground shielding (PGS) proximate the first inductor comprising one or more portions and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. The semiconductor device also has a configuration including a first inductor on a first side of the PGS, a second inductor on a second side of the PGS and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. Selective coupling of portions of the PGS by activating or deactivating switches alters the behavior of the first inductor, or the behavior and interaction between the first inductor and the second inductor. A mechanism is thus provided for selectively configuring a PGS to control inductive or other properties of a circuit.

Abstract: An asymmetric spiral inductor is provided. The asymmetric spiral inductor includes a first winding, a second winding and a third winding. The first winding has a first end and a second end and is implemented in the ultra-thick metal (UTM) layer of a semiconductor structure. The second winding, which has a third end and a fourth end, is implemented in the re-distribution layer of the semiconductor structure and has a first maximum trace width. The third winding, which has a fifth end and a sixth end, is implemented in the UTM layer of the semiconductor structure and has a second maximum trace width smaller than the first maximum trace width. The second and third ends are connected through a first through structure, the fourth and fifth ends are connected through a second through structure, and the first and sixth ends are the two ends of the asymmetric spiral inductor.

Abstract: An integrated circuit includes a first coil and a second coil. The first coil is disposed on the first side of the integrated circuit. The second coil is disposed on the second side of the integrated circuit, and is partially overlapped with the first coil at a junction. The first coil is not interlaced with the second coil at the junction.

Abstract: An integrated device comprising a die substrate, a die interconnection portion coupled to the die substrate, and a stacked inductor that includes a first figure 8-shaped inductor and a second figure 8-shaped inductor. The stacked inductor may include a first spiral comprising a first origin and a first tail, a second spiral comprising a second origin and a second tail, a third spiral comprising a third origin and a third tail and a fourth spiral comprising a fourth origin and a fourth tail. The first spiral, the second spiral, the third spiral and the fourth spiral may form the first figure 8-shaped inductor and the second figure 8-shaped inductor. The stacked inductor may be located in the die interconnection.

Abstract: An integrated device comprising a die substrate, a die interconnection portion coupled to the die substrate, an inductor, and a shield structure. The shield structure comprises a shield frame and a plurality of shield branches coupled to the shield frame, wherein at least one shield branch from the plurality of shield branches comprises a repeating wave shape.

Abstract: An integrated device comprising a die substrate; and a die interconnection portion coupled to the die substrate. The die interconnection comprises a first inductor and a second inductor. The first inductor comprises a first spiral comprising a first origin and a first tail and a second spiral comprising a second origin and a second tail.

Abstract: An inductor device includes a first trace, a second trace, a third trace, a fourth trace, and a double ring inductor. The first trace is disposed in a first area, and located on a first layer. The second trace is disposed in the first area, coupled to the first trace, and located on a second layer. The third trace is disposed in a second area, and located on the first layer. The fourth trace is disposed in the second area, coupled to the third trace, and located on the second layer. The double ring inductor is disposed on the first layer, located at outer side of the first trace and the third trace, and coupled to the first trace and the third trace.

Abstract: An inductor device includes a first inductor, a first connection member, a second inductor, and a second connection member. The first inductor includes a first and a second trace. The first trace is disposed in a first area, and the second trace is disposed in a second area. The first and the second area are connected at a junction. The first connection member is disposed at a block at which the first and the second trace are not disposed, and coupled to the first and the second trace. The second inductor includes a third and a fourth trace. The third trace is disposed in the first area, and the fourth trace is disposed in the second area. The second connection member is disposed at a block at which the third and the fourth trace are not disposed, and coupled to the third and the fourth trace.