Patents by Inventor Hsiao-Tsung Yen

Hsiao-Tsung Yen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942258
    Abstract: An inductor device includes a first and a second inductor and a first and a second connection member. A first and a second trace of the first inductor is located on a first and a second layer respectively. The second trace is coupled to the first trace located at a first and a second area. The first connection member is coupled to the second trace. A third and a fourth trace of the second inductor is located on the first and the second layer respectively. The first trace and the third trace are disposed in turn at the first area and the second area. The fourth trace is coupled to the third trace located at the first and the second area. The second and the fourth trace are disposed in turn at the first and the second area. The second connection member is coupled to the fourth trace.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: March 26, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ting-Yao Huang, Ka-Un Chan
  • Patent number: 11929196
    Abstract: A method of making a slow wave inductive structure includes depositing a first dielectric layer over a first substrate. The method further includes forming a first conductive winding in the first dielectric layer. The method further includes bonding a second substrate to the first dielectric layer, wherein the second substrate is physically separated from the first conductive winding, and the second substrate has a thickness ranging from about 50 nanometers (nm) to about 150 nm. The method further includes depositing a second dielectric layer over the second substrate. The method further includes forming a second conductive winding in the second dielectric layer, wherein the second substrate is physically separated from the second conductive winding.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiao-Tsung Yen, Cheng-Wei Luo
  • Patent number: 11923818
    Abstract: An inductor device includes a first trace, a second trace, a first capacitor, and at least one connection element. The first trace includes at least two sub-traces. One terminal of the at least two sub-traces is coupled to a first node. The second trace includes at least two sub-traces. One terminal of the at least two sub-traces is coupled to a second node. The first capacitor is coupled between the first node and the second node. The at least one connection element is coupled to another terminal of the at least two sub-traces of the first trace and another terminal of the at least two sub-traces of the second trace, such that the first trace and the second trace form a closed loop.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: March 5, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Hsiao-Tsung Yen
  • Patent number: 11915848
    Abstract: An inductor device includes an 8-shaped inductor structure, a first spiral wire, a first connector, a second connector, and a first interlaced component. The 8-shaped inductor structure includes two first-wires and two second-wires. The first spiral wire is disposed on an inner side of the two first-wires. The first connector is coupled to one of the two first-wires and one of the two second-wires. The second connector is coupled to another one of the two first-wires. The first interlaced component is coupled to the first spiral wire and another one of the two second-wires, and the first interlaced component is coupled to the first connector and the second connector in an interlaced manner respectively.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: February 27, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Patent number: 11901399
    Abstract: A semiconductor device includes a first coil, a second coil, and a third coil. The second coil is disposed with respect to the first coil. The third coil is configured to sense a signal on the first coil. A first overlapped area, on a projection plane, of the third coil and the first coil is larger than a second overlapped area, on the projection plane, of the third coil and the second coil.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: February 13, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Patent number: 11901111
    Abstract: An inductor device includes a first wire, a second wire, at least one first connector, at least one second connector, and a first center-tapped terminal. The first wire includes a plurality of first sub-wires. The second wire includes a plurality of second sub-wires. The first sub-wires and the second sub-wires are disposed in an interlaced manner. The at least one first connector couples the first sub-wire that is disposed on an outer side and the first sub-wire that is disposed on an inner side in the first sub-wires. The at least one second connector couples the second sub-wire that is disposed on the outer side and the second sub-wire that is disposed on the inner side in the second sub-wires. The first center-tapped terminal is coupled to the first sub-wire that is disposed on the outer side in the first sub-wires.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: February 13, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Kuan-Yu Shih, Ka-Un Chan
  • Patent number: 11876113
    Abstract: An integrated transformer is provided. The integrated transformer includes a first inductor and second inductors. The first inductor includes a first winding having a first outer turn and a second winding having a second outer turn. The second inductor includes a third winding having a third outer turn and a fourth winding having a fourth outer turn. The first and third outer turns substantially overlap, and the second and fourth outer turns substantially overlap. The first and second outer turns are connected to each other through a first segment and a second segment that together form a crossing structure, and the third and fourth outer turns are connected to each other through a third segment and a fourth segment that together form a crossing structure. The first and third segments are in the first metal layer, while the second and fourth segments are in the second metal layer.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: January 16, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Patent number: 11869700
    Abstract: An inductor device includes first trace, second trace, third trace, fourth trace, first capacitor, and second capacitor. One terminal of each of the at least two sub-traces of first trace are coupled to each other at first node. One terminal of each of the at least two sub-traces of second trace are coupled to each other at second node. One terminal of third trace is coupled to second trace, and another terminal of third trace is coupled to first input/output terminal. One terminal of fourth trace is coupled to first trace, and another terminal of fourth trace is coupled to second input/output terminal. First capacitor is coupled to first node and second node. Second capacitor is coupled between first node and first input/output terminal, or coupled between first node and second input/output terminal, or coupled between first input/output terminal and second input/output terminal.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: January 9, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Jian-You Chen, Ka-Un Chan
  • Patent number: 11830649
    Abstract: A double 8-shaped inductive device includes a first 8-shaped coil, a second 8-shaped coil, and a connection structure. The first 8-shaped coil includes a first connecting terminal. The second 8-shaped coil includes a second connecting terminal, which the first 8-shaped coil and the second 8-shaped coil are to be disposed side by side on two sides of a first imaginary line. The connection structure electrically couples to the first connecting terminal and the second connecting terminal, such that the first 8-shaped coil and the second 8-shaped coil form a connected circuit, and the first 8-shaped coil and the second 8-shaped coil include a loop respectively.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: November 28, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Patent number: 11830659
    Abstract: A shielding structure is disclosed. The shielding structure includes a patterned shielding layer and a ring structure. The patterned shielding layer is extended along a plane and located between an inductor structure and a substrate. The ring structure is coupled to and stacked on the patterned shielding layer along a first direction. The first direction is perpendicular to the plane. The ring structure surrounds the patterned shielding layer. The ring structure includes at least one opening and a ground terminal.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: November 28, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Yi-Syue Han
  • Patent number: 11830656
    Abstract: A transformer device includes a first coil and a second coil. The first coil includes a number of first circles. The second coil includes a number of second circles. A first side of a first one of the first coil is adjacent to one of the first coil, and a second side of the first one of the first coil is adjacent to one of the second coil. A first side and a second side of a second one of the first coil are adjacent to one of the second coil, respectively.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: November 28, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Patent number: 11783991
    Abstract: An inductor device includes a first inductor and a second inductor. The first inductor has a first winding and a second winding. The second inductor has a third winding and a fourth winding, and the second inductor is disposed adjacent to the first inductor, and the second inductor is coupled to the first inductor in an interlaced manner.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: October 10, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Patent number: 11770144
    Abstract: The present invention discloses a communication apparatus having feedback calibration mechanism. A signal transmission circuit generates a RF analog signal according to a digital signal. A signal amplifying circuit amplifies the RF analog signal to generate an amplified analog signal. A LC impedance matching circuit transmits the amplified analog signal to the antenna to perform transmission. A feedback calibration circuit includes a feedback inductive circuit and a calibration circuit. A feedback inductive circuit is inductively coupled to the LC impedance matching circuit to receive the amplified analog signal to generate a feedback signal. A calibration circuit determines a distorted amount of the feedback signal relative to the RF analog signal to modify an operation parameter of at least one of the signal transmission circuit and the signal amplifying circuit to decrease the distorted amount.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: September 26, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kuan-Yu Shih, Hsiao-Tsung Yen
  • Publication number: 20230298796
    Abstract: An inductor device includes a first inductor, a switch, and a second inductor. The first inductor includes a first, a second, a third, and a fourth trace. The first trace is disposed at a first area of the inductor device. The second trace is disposed inside the first trace. The third trace is disposed at a second area of the inductor device. The fourth trace is disposed inside the third trace. When the switch is turned off, the first, the second, the third, and the fourth trace form first path. When the switch is turned on, the first, the third, and the fourth trace form second path. The second inductor includes a fifth and a sixth trace. The fifth trace is disposed at the first area of the inductor device. The six trace is disposed at the second area of the inductor device, and coupled to the fifth trace.
    Type: Application
    Filed: June 16, 2022
    Publication date: September 21, 2023
    Inventors: Hsiao-Tsung YEN, Jon-Jin CHEN
  • Publication number: 20230246061
    Abstract: An inductor device includes a pattern ground shield (PGS) structure, a first trace, a second trace, and a first center-tapped element. The first trace is disposed above the pattern ground shield structure, and located in a first area. The second trace is disposed above the pattern ground shield structure, and located in a second area. The first area is adjacent to the second area. The first center-tapped element is disposed above the first trace or below the first trace, and passes through a first center point of the first area.
    Type: Application
    Filed: June 10, 2022
    Publication date: August 3, 2023
    Inventor: Hsiao-Tsung YEN
  • Publication number: 20230223181
    Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes a first sub-trace and a second sub-trace. The first sub-trace includes a plurality of first wires. The second sub-trace includes a plurality of second wires, wherein the first wires and the second wires are disposed on the same layer. The first wires and the second wires are disposed to each other in an interlaced manner, and located at a first corner of the inductor device. The second trace includes a third sub-trace and a fourth sub-trace. The capacitor is coupled between the first sub-trace and the third sub-trace.
    Type: Application
    Filed: January 6, 2023
    Publication date: July 13, 2023
    Inventors: Hsiao-Tsung YEN, Hung-Han CHEN
  • Patent number: 11699656
    Abstract: A tank circuit structure includes a first gate layer, a first substrate, a first shielding layer, a first inductor, a second inductor and a first inter metal dielectric (IMD) layer. The first substrate is over the first gate layer. The first shielding layer is over the first gate layer. The first inductor is over the first shielding layer. The second inductor is below the first substrate. The first IMD layer is between the first substrate and the first shielding layer.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: July 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiao-Tsung Yen, Cheng-Wei Luo
  • Patent number: 11699550
    Abstract: An inductor structure includes a first curve metal component, a second curve metal component, a connection component, and a capacitor. The first and the second curve metal components are disposed on a layer. The layer is located at a first plane, the first and the second curve metal components are located at a second plane. The connection component is coupled to the first curve metal component and the second curve metal component. A first terminal of the connection component is coupled to a first terminal of the first curve metal component. A second terminal of the connection component is coupled to a first terminal of the second curve metal component. A first terminal of the capacitor is coupled to a second terminal of the first curve metal component. A second terminal of the capacitor is coupled to a second terminal of the second curve metal component.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: July 11, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Chih-Yu Tsai, Kai-Yi Huang
  • Patent number: 11694835
    Abstract: An inductor device includes a first trace, a second trace, and a double ring inductor. The first trace is disposed at a first area. The second trace is disposed at a second area. The double ring inductor is located at an outside of the first trace and the second trace. The double ring inductor is respectively coupled to the first trace and the second trace in an interlaced manner.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: July 4, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Patent number: 11670669
    Abstract: An integrated transformer includes a first and second inductors. The first inductor includes a first and second windings. The second inductor includes a third and fourth windings. The first, second, third and fourth windings have a first, second, third and fourth outer turn, respectively. At least one segment of the first (or second) outer turn substantially overlaps at least one segment of the third (or fourth) outer turn. The first and second outer turns are connected through a first segment and a first trace that cross each other, and the third and fourth outer turns are connected through a second trace and a second segment that cross each other. The first trace and the second segment are on the first metal layer, and the first segment and the second trace are on the second metal layer different from the first metal layer.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: June 6, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan