Abstract: A stacked inductor device including an 8-shaped inductor structure a stacked coil. The 8-shaped inductor structure includes a first coil and a second coil. The first coil is disposed in a first area. The first coil includes a first sub-coil and a second sub-coil, and the first sub-coil and the second sub-coil are disposed with an interval circularly with each other. The second coil is disposed in a second area, and the second coil is coupled with the first coil on a boundary between the first area and the second area. The second coil includes a third sub-coil and a fourth sub-coil, and the third sub-coil and the fourth sub-coil are disposed with an interval circularly with each other. The stacked coil is coupled to the first coil and the second coil and is stacked partially on or under the first coil and the second coil.

Abstract: An inductive unit is formed in an integrated circuit. An electromagnetic radiation test is performed thereon. When an amount of electromagnetic radiation exceeds a radiation threshold value, a shielding structure is formed. The shielding structure has a width and a distance separated from the inductive unit such that a decreasing amount of a quality factor of the inductive unit is not larger than a first predetermined value and a shielded amount of electromagnetic radiation is not lower than a second predetermined value. The inductive unit has a symmetric shape and the inductive device further includes a single asymmetric inductive portion. The closed shape of the shielding structure encloses the inductive unit and covers the single asymmetric inductive portion. A part of the single asymmetric inductive portion extends along a peripheral direction of the shielding structure.

Abstract: A semiconductor device includes a first conductive winding over a first substrate. The semiconductor device further includes a second substrate bonded to the first substrate. The semiconductor device further includes a switch in the second substrate. The semiconductor device further includes an inter-level via (ILV) in the second substrate. The semiconductor device further includes a second conductive winding over the second substrate, wherein the second conductive winding includes a conductive line around a central opening, the switch is electrically connected to the second conductive winding on a first side of the opening, and the ILV is electrically connected to the second conductive winding on a second side of the opening opposite the first side.

Abstract: An inductor device includes a first trace, a second trace, a third trace, a fourth trace, and a double ring inductor. The first trace is disposed in a first area, and located on a first layer. The second trace is disposed in the first area, coupled to the first trace, and located on a second layer. The third trace is disposed in a second area, and located on the first layer. The fourth trace is disposed in the second area, coupled to the third trace, and located on the second layer. The double ring inductor is disposed on the first layer, located at outer side of the first trace and the third trace, and coupled to the first trace and the third trace.

Abstract: Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.

Abstract: An integrated transformer is provided. The integrated transformer includes a first inductor and second inductors. The first inductor includes a first winding having a first outer turn and a second winding having a second outer turn. The second inductor includes a third winding having a third outer turn and a fourth winding having a fourth outer turn. The first and third outer turns substantially overlap, and the second and fourth outer turns substantially overlap. The first and second outer turns are connected to each other through a first segment and a second segment that together form a crossing structure, and the third and fourth outer turns are connected to each other through a third segment and a fourth segment that together form a crossing structure. The first and third segments are in the first metal layer, while the second and fourth segments are in the second metal layer.

Abstract: An inductor device includes a first and a second inductor and a first and a second connection member. A first and a second trace of the first inductor is located on a first and a second layer respectively. The second trace is coupled to the first trace located at a first and a second area. The first connection member is coupled to the second trace. A third and a fourth trace of the second inductor is located on the first and the second layer respectively. The first trace and the third trace are disposed in turn at the first area and the second area. The fourth trace is coupled to the third trace located at the first and the second area. The second and the fourth trace are disposed in turn at the first and the second area. The second connection member is coupled to the fourth trace.

Abstract: A method of making a slow wave inductive structure includes depositing a first dielectric layer over a first substrate. The method further includes forming a first conductive winding in the first dielectric layer. The method further includes bonding a second substrate to the first dielectric layer, wherein the second substrate is physically separated from the first conductive winding, and the second substrate has a thickness ranging from about 50 nanometers (nm) to about 150 nm. The method further includes depositing a second dielectric layer over the second substrate. The method further includes forming a second conductive winding in the second dielectric layer, wherein the second substrate is physically separated from the second conductive winding.

Abstract: An inductor device includes a first trace, a second trace, a first capacitor, and at least one connection element. The first trace includes at least two sub-traces. One terminal of the at least two sub-traces is coupled to a first node. The second trace includes at least two sub-traces. One terminal of the at least two sub-traces is coupled to a second node. The first capacitor is coupled between the first node and the second node. The at least one connection element is coupled to another terminal of the at least two sub-traces of the first trace and another terminal of the at least two sub-traces of the second trace, such that the first trace and the second trace form a closed loop.

Abstract: An inductor device includes an 8-shaped inductor structure, a first spiral wire, a first connector, a second connector, and a first interlaced component. The 8-shaped inductor structure includes two first-wires and two second-wires. The first spiral wire is disposed on an inner side of the two first-wires. The first connector is coupled to one of the two first-wires and one of the two second-wires. The second connector is coupled to another one of the two first-wires. The first interlaced component is coupled to the first spiral wire and another one of the two second-wires, and the first interlaced component is coupled to the first connector and the second connector in an interlaced manner respectively.

Abstract: An inductor device includes a first wire, a second wire, at least one first connector, at least one second connector, and a first center-tapped terminal. The first wire includes a plurality of first sub-wires. The second wire includes a plurality of second sub-wires. The first sub-wires and the second sub-wires are disposed in an interlaced manner. The at least one first connector couples the first sub-wire that is disposed on an outer side and the first sub-wire that is disposed on an inner side in the first sub-wires. The at least one second connector couples the second sub-wire that is disposed on the outer side and the second sub-wire that is disposed on the inner side in the second sub-wires. The first center-tapped terminal is coupled to the first sub-wire that is disposed on the outer side in the first sub-wires.

Abstract: A semiconductor device includes a first coil, a second coil, and a third coil. The second coil is disposed with respect to the first coil. The third coil is configured to sense a signal on the first coil. A first overlapped area, on a projection plane, of the third coil and the first coil is larger than a second overlapped area, on the projection plane, of the third coil and the second coil.

Abstract: An integrated transformer is provided. The integrated transformer includes a first inductor and second inductors. The first inductor includes a first winding having a first outer turn and a second winding having a second outer turn. The second inductor includes a third winding having a third outer turn and a fourth winding having a fourth outer turn. The first and third outer turns substantially overlap, and the second and fourth outer turns substantially overlap. The first and second outer turns are connected to each other through a first segment and a second segment that together form a crossing structure, and the third and fourth outer turns are connected to each other through a third segment and a fourth segment that together form a crossing structure. The first and third segments are in the first metal layer, while the second and fourth segments are in the second metal layer.

Abstract: An inductor device includes first trace, second trace, third trace, fourth trace, first capacitor, and second capacitor. One terminal of each of the at least two sub-traces of first trace are coupled to each other at first node. One terminal of each of the at least two sub-traces of second trace are coupled to each other at second node. One terminal of third trace is coupled to second trace, and another terminal of third trace is coupled to first input/output terminal. One terminal of fourth trace is coupled to first trace, and another terminal of fourth trace is coupled to second input/output terminal. First capacitor is coupled to first node and second node. Second capacitor is coupled between first node and first input/output terminal, or coupled between first node and second input/output terminal, or coupled between first input/output terminal and second input/output terminal.

Abstract: A shielding structure is disclosed. The shielding structure includes a patterned shielding layer and a ring structure. The patterned shielding layer is extended along a plane and located between an inductor structure and a substrate. The ring structure is coupled to and stacked on the patterned shielding layer along a first direction. The first direction is perpendicular to the plane. The ring structure surrounds the patterned shielding layer. The ring structure includes at least one opening and a ground terminal.

Abstract: A transformer device includes a first coil and a second coil. The first coil includes a number of first circles. The second coil includes a number of second circles. A first side of a first one of the first coil is adjacent to one of the first coil, and a second side of the first one of the first coil is adjacent to one of the second coil. A first side and a second side of a second one of the first coil are adjacent to one of the second coil, respectively.

Abstract: A double 8-shaped inductive device includes a first 8-shaped coil, a second 8-shaped coil, and a connection structure. The first 8-shaped coil includes a first connecting terminal. The second 8-shaped coil includes a second connecting terminal, which the first 8-shaped coil and the second 8-shaped coil are to be disposed side by side on two sides of a first imaginary line. The connection structure electrically couples to the first connecting terminal and the second connecting terminal, such that the first 8-shaped coil and the second 8-shaped coil form a connected circuit, and the first 8-shaped coil and the second 8-shaped coil include a loop respectively.

Abstract: An inductor device includes a first inductor and a second inductor. The first inductor has a first winding and a second winding. The second inductor has a third winding and a fourth winding, and the second inductor is disposed adjacent to the first inductor, and the second inductor is coupled to the first inductor in an interlaced manner.

Abstract: The present invention discloses a communication apparatus having feedback calibration mechanism. A signal transmission circuit generates a RF analog signal according to a digital signal. A signal amplifying circuit amplifies the RF analog signal to generate an amplified analog signal. A LC impedance matching circuit transmits the amplified analog signal to the antenna to perform transmission. A feedback calibration circuit includes a feedback inductive circuit and a calibration circuit. A feedback inductive circuit is inductively coupled to the LC impedance matching circuit to receive the amplified analog signal to generate a feedback signal. A calibration circuit determines a distorted amount of the feedback signal relative to the RF analog signal to modify an operation parameter of at least one of the signal transmission circuit and the signal amplifying circuit to decrease the distorted amount.

Abstract: An inductor device includes a first inductor, a switch, and a second inductor. The first inductor includes a first, a second, a third, and a fourth trace. The first trace is disposed at a first area of the inductor device. The second trace is disposed inside the first trace. The third trace is disposed at a second area of the inductor device. The fourth trace is disposed inside the third trace. When the switch is turned off, the first, the second, the third, and the fourth trace form first path. When the switch is turned on, the first, the third, and the fourth trace form second path. The second inductor includes a fifth and a sixth trace. The fifth trace is disposed at the first area of the inductor device. The six trace is disposed at the second area of the inductor device, and coupled to the fifth trace.