Patents by Inventor Hsiao Wei Chen

Hsiao Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948938
    Abstract: In some embodiments, the present disclosure relates to a semiconductor device comprising a source and drain region arranged within a substrate. A conductive gate is disposed over a doped region of the substrate. A gate dielectric layer is disposed between the source region and the drain region and separates the conductive gate from the doped region. A bottommost surface of the gate dielectric layer is below a topmost surface of the substrate. First and second sidewall spacers are arranged along first and second sides of the conductive gate, respectively. An inner portion of the first sidewall spacer and an inner portion of the second sidewall spacer respectively cover a first and second top surface of the gate dielectric layer. A drain extension region and a source extension region respectively separate the drain region and the source region from the gate dielectric layer.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Huan Chen, Chien-Chih Chou, Ta-Wei Lin, Hsiao-Chin Tuan, Alexander Kalnitsky, Kong-Beng Thei, Shi-Chuang Hsiao, Yu-Hong Kuo
  • Patent number: 11778322
    Abstract: An electronic image stabilization (EIS) method includes: obtaining video frames derived from an output of an image sensor, wherein each of the video frames has a full field of view (FOV) of the image sensor; obtaining motion information of the video frames; dynamically estimating, by a processing circuit, EIS margins according to FOV variation of a plurality of cropped images within the video frames respectively; and applying stabilization correction to the cropped images according to the motion information and the EIS margins, to generate a plurality of stabilized images.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: October 3, 2023
    Assignee: MEDIATEK INC.
    Inventors: Hsiao-Wei Chen, Meng-Hung Cho, Yu-Chun Chen, Shu-Fan Wang, Te-Hao Chang, Ying-Jui Chen
  • Patent number: 11626315
    Abstract: A planarization method includes forming a dielectric layer over a polish stop layer. The dielectric layer is polished until reaching the polish stop layer, and the polished dielectric layer has a concave top surface. A compensation layer is formed over the concave top surface. The compensation layer is polished.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: April 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Jung Huang, Hsu-Shui Liu, Han-Wen Liao, Yu-Yao Huang, Hsiao-Wei Chen, Yung-Lin Hsu, Kuang-Huan Hsu
  • Publication number: 20220053134
    Abstract: An electronic image stabilization (EIS) method includes: obtaining video frames derived from an output of an image sensor, wherein each of the video frames has a full field of view (FOV) of the image sensor; obtaining motion information of the video frames; dynamically estimating, by a processing circuit, EIS margins according to FOV variation of a plurality of cropped images within the video frames respectively; and applying stabilization correction to the cropped images according to the motion information and the EIS margins, to generate a plurality of stabilized images.
    Type: Application
    Filed: August 3, 2021
    Publication date: February 17, 2022
    Applicant: MEDIATEK INC.
    Inventors: Hsiao-Wei Chen, Meng-Hung Cho, Yu-Chun Chen, Shu-Fan Wang, Te-Hao Chang, Ying-Jui Chen
  • Publication number: 20180151412
    Abstract: A planarization method includes forming a dielectric layer over a polish stop layer. The dielectric layer is polished until reaching the polish stop layer, and the polished dielectric layer has a concave top surface. A compensation layer is formed over the concave top surface. The compensation layer is polished.
    Type: Application
    Filed: February 22, 2017
    Publication date: May 31, 2018
    Inventors: Chun-Jung Huang, Hsu-Shui Liu, Han-Wen Liao, Yu-Yao Huang, Hsiao-Wei Chen, Yung-Lin Hsu, Kuang-Huan Hsu
  • Patent number: 9443349
    Abstract: An electronic apparatus and a method for incremental pose estimation and photographing are provided. In the method, at least two images of a 3D object are captured at different positions encircling the 3D object. Displacements and angular displacements are detected when capturing the images. Features of the 3D object in the images, the displacements and the angular displacements are used to estimate a central position of the 3D object and a distance between the electronic apparatus and the 3D object. A circumference suitable for capturing the images of the 3D object is estimated based on the distance and is divided into several segments, and a timing interval of a timer is adjusted based on a length of the segments. A camera of the electronic apparatus is triggered at intervals set by the timer to capture the images of the 3D object.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: September 13, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Te-Mei Wang, Chen-Hao Wei, Hsiao-Wei Chen
  • Publication number: 20160163091
    Abstract: An electronic apparatus and a method for incremental pose estimation and photographing are provided. In the method, at least two images of a 3D object are captured at different positions encircling the 3D object. Displacements and angular displacements are detected when capturing the images. Features of the 3D object in the images, the displacements and the angular displacements are used to estimate a central position of the 3D object and a distance between the electronic apparatus and the 3D object. A circumference suitable for capturing the images of the 3D object is estimated based on the distance and is divided into several segments, and a timing interval of a timer is adjusted based on a length of the segments. A camera of the electronic apparatus is triggered at intervals set by the timer to capture the images of the 3D object.
    Type: Application
    Filed: December 18, 2014
    Publication date: June 9, 2016
    Inventors: Te-Mei Wang, Chen-Hao Wei, Hsiao-Wei Chen
  • Patent number: 9076249
    Abstract: A hole filling method for multi-view disparity maps is provided. At least one disparity map is respectively captured as a plurality of known views among a plurality of views for capturing an object. As for a plurality of virtual views among the views excluding the at least one known view, disparity maps of the virtual views are synthesized by sequentially using the disparity maps of the known views according to a distance of a virtual camera position or a transformed angle between each virtual view and each known view. Hole filling information of the disparity maps of other virtual views having the distances or the transformed angles smaller than that of the virtual view is used to fill holes in the synthesized disparity maps of the virtual views.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 7, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Hsiao-Wei Chen, Te-Mei Wang, Wei-Yi Lee
  • Patent number: 8934707
    Abstract: An image processing apparatus includes a determination unit, a search unit, a weight assignment unit and a filling unit. The determination unit determines whether a hole is surrounded by the foreground in a disparity map or a depth map. The search unit searches for multiple relative backgrounds along multiple directions when the hole is surrounded by the foreground. The weight assignment unit respectively assigns weights to the relative backgrounds. The filling unit selects an extremum from the weights, and fills the hole according to the relative background corresponding to the extremum.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: January 13, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Te-Mei Wang, Hsiao-Wei Chen
  • Publication number: 20110128354
    Abstract: Systems and methods for obtaining camera parameters from images are provided. First, a sequence of original images associated with a target object under circular motion is obtained. Then, a background image and a foreground image corresponding to the target object within each original image are segmented. Next, shadow detection is performed for the target object within each original image. A first threshold and a second threshold are respectively determined according to the corresponding background and foreground images. Each original image, the corresponding background image, the first and second threshold are used for obtaining silhouette data and feature information associated with the target object within each original image. At least one camera parameter is obtained based on the entire feature information and the geometry of circular motion.
    Type: Application
    Filed: December 14, 2009
    Publication date: June 2, 2011
    Inventors: Tzu-Chieh TIEN, Po-Hao Huang, Chia-Ming Cheng, Hao-Liang Yang, Hsiao-Wei Chen, Shang-Hong Lai, Susan Dong, Cheng-Da Liu, Te-Lu Tsai, Jung-Hsin Hsiao
  • Publication number: 20040106260
    Abstract: The invention provides a process of utilizing CF4 plasma pretreatment to improve high-k dielectric materials. The process is performed by the standard complimentary metal-oxide-semiconductor field enhanced transistor (CMOSFET) in accordance with the high-k dielectric materials, in which CF4 plasma generated by plasma enhanced chemical vapor deposition (PECVD) is used to perform pretreatment on the silicon substrate, and a large amount of fluorine will be incorporated on the surface of silicon substrate. Then, a gate dielectric layer is deposited on the surface of silicon substrate, and a thermal annealing in an oxygen ambience is performed. At this time, the silicon substrate incorporating with fluorine will not respond to the high-k dielectric materials to form silicate; therefore, the property of silicon substrate can be improved. The advantages of high-k dielectric materials formed by the process include low leakage current, high breakdown voltage, and good reliability.
    Type: Application
    Filed: February 5, 2003
    Publication date: June 3, 2004
    Inventors: Tan Fu Lei, Tzu Yun Chang, Hsiao Wei Chen