Patents by Inventor Hsiao-Wei Kao

Hsiao-Wei Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System for display images and fabrication method thereof
    Patent number: 8045082
    Abstract: A system for display images comprising a thin film transistor array substrate is disclosed. The system for display images comprises a substrate having a pixel area, a source/drain region overlying the substrate within an active layer in the pixel area, a bottom electrode overlying the substrate in the pixel area, a top electrode overlying the bottom electrode, a first dielectric layer disposed on the active layer, a second dielectric layer disposed on the first dielectric layer, wherein the second dielectric layer is disposed between the bottom electrode and the top electrode and a gate disposed overlying the active layer, wherein the first and second dielectric layers are interposed between the gate and the active layer.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: October 25, 2011
    Assignee: Chimei Innolux Corporation
    Inventors: Ramesh Kakkad, Hsiao-Wei Kao, Chung-Sheng Lin, Chih-Chung Liu
  • SYSTEM FOR DISPLAY IMAGES AND FABRICATION METHOD THEREOF
    Publication number: 20090237580
    Abstract: A system for display images comprising a thin film transistor array substrate is disclosed. The system for display images comprises a substrate having a pixel area, a source/drain region overlying the substrate within an active layer in the pixel area, a bottom electrode overlying the substrate in the pixel area, a top electrode overlying the bottom electrode, a first dielectric layer disposed on the active layer, a second dielectric layer disposed on the first dielectric layer, wherein the second dielectric layer is disposed between the bottom electrode and the top electrode and a gate disposed overlying the active layer, wherein the first and second dielectric layers are interposed between the gate and the active layer.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Applicant: TPO Displays Corp.
    Inventors: Ramesh KAKKAD, Hsiao-Wei KAO, Chung-Sheng LIN, Chih-Chung LIU