Patents by Inventor Hsieh-Hung Hsieh

Hsieh-Hung Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120068745
    Abstract: A representative injection-locked frequency divider includes a differential direct injection pair that is configured to receive and mix differential injection signals and an oscillator that is electrically connected to the differential direct injection pair and produces an operating frequency based on the mixed differential injection signals.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 22, 2012
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsieh-Hung HSIEH, Chewn-Pu JOU, Fu-Lung HSUEH
  • Publication number: 20120032743
    Abstract: A low-noise amplifier (“LNA”) includes a first cascode gain stage including a first complementary metal oxide semiconductor (“CMOS”) transistor configured to receive a radio frequency (“RF”) input signal and a second CMOS transistor coupled to an output node. The first inductive gate network is coupled to a gate of the second CMOS transistor for increasing a gain of the first cascode gain stage. The first inductive gate network has a non-zero inductive input impedance and includes at least one passive circuit element.
    Type: Application
    Filed: December 15, 2010
    Publication date: February 9, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsieh-Hung HSIEH, Po-Yi WU, Ho-Hsiang CHEN, Chewn-Pu JOU, Fu-Lung HSUEH
  • Publication number: 20120032742
    Abstract: A low-noise amplifier (LNA) includes a first cascode gain stage coupled to an input node for increasing an amplitude of an RF input signal. A first variable gain network is coupled to the first cascode gain stage and includes a first inductor for boosting a gain of the first cascode gain stage, a first capacitor coupled to the first inductor for blocking a direct current (DC) voltage, and a first switch coupled to the first inductor and to the first capacitor. The first switch is configured to selectively couple the first inductor to the first cascode gain stage in response to a first control signal.
    Type: Application
    Filed: August 6, 2010
    Publication date: February 9, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsieh-Hung HSIEH, Po-Yi WU, Ho-Hsiang CHEN, Chewn-Pu JOU, Fu-Lung HSUEH
  • Publication number: 20120019968
    Abstract: An ESD protection circuit includes a signal pad, a short circuited shunt stub on-chip with and coupled to the signal pad, an open circuited shunt stub on-chip and coupled to the signal pad.
    Type: Application
    Filed: July 26, 2010
    Publication date: January 26, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsieh-Hung HSIEH, Po-Yi WU, Ho-Hsiang CHEN, Chewn-Pu JOU, Fu-Lung HSUEH