Abstract: A fast modulated lapped transform (MLT) method and architecture for image compression and decompression systems minimizes blocking artifacts associated with JPEG based discrete cosine transform (DCT) image compression systems. The MLT method combines fast block processing capabilities of wavelet transforms and fast block processing of DCT image compression systems. The modular and pipeline MLT architecture is fast by block processing but avoids the visual blocking artifacts that can be seen in most DCT-based compression systems. Improved MLT processors are implemented by an infinite impulse response filter operating on a product of the MLT window function and the input data stream. Forward and reverse MLT processors include a new fused multiply-add logic for fast computations and localized interconnections. The MLT processors can be combined into a bank of parallel processors in a one dimensional MLT architecture, which can be used for two-dimensional image transformation.

Abstract: To eliminate reflections and oscillations when a low impedance level circuit is to be connected to a high impedance level circuit on a printed circuit board, a microstrip/stripline impedance transformer is inserted in between. This transformer is passive and bi-directional, i.e., it can be step-up or step-down. It is made of a continuous folded microstrip (also called a surface etched line) or a continuous folded stripline (also called a buried etched line) wherein each folded section is run in parallel with its preceding one. Because of the mutual coupling between each section with its preceding one, the line impedance of each section will be step-up or step-down depending on the impedance levels at both ends of the interconnection.