Patents by Inventor Hsien-Cheng Huang

Hsien-Cheng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136346
    Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.
    Type: Application
    Filed: April 17, 2023
    Publication date: April 25, 2024
    Inventors: Chien Hung LIU, Yu-Sheng CHEN, Yi Ching ONG, Hsien Jung CHEN, Kuen-Yi CHEN, Kuo-Ching HUANG, Harry-HakLay CHUANG, Wei-Cheng WU, Yu-Jen WANG
  • Publication number: 20240135745
    Abstract: An electronic device has a narrow viewing angle state and a wide viewing angle state, and includes a panel and a light source providing a light passing through the panel. In the narrow viewing angle state, the light has a first relative light intensity and a second relative light intensity. The first relative light intensity is the strongest light intensity, the second relative light intensity is 50% of the strongest light intensity, the first relative light intensity corresponds to an angle of 0°, the second relative light intensity corresponds to a half-value angle, and the half-value angle is between ?15° and 15°. In the narrow angle state, a third relative light intensity at each angle between 20° and 60° or each angle between ?20° and ?60° is lower than 20% of the strongest light intensity.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: InnnoLux Corporation
    Inventors: Kuei-Sheng Chang, Po-Yang Chen, Kuo-Jung Wu, I-An Yao, Wei-Cheng Lee, Hsien-Wen Huang
  • Publication number: 20240096705
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Patent number: 11916146
    Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
  • Publication number: 20220291675
    Abstract: Embodiments of the present invention provide a multiple-variable predictive maintenance method for a component of a production tool and a computer program product thereof, in which a multiple-variable time series prediction (TSPMVA) and an information criterion algorithm are adapted to build a best vector autoregression model (VAR), thereby forecasting the complicated future trend of accidental shutdown of the component of the production tool. Therefore, the multiple-variable prediction of the present invention can improve the accuracy of prediction compared with the single-variable prediction.
    Type: Application
    Filed: May 25, 2022
    Publication date: September 15, 2022
    Inventors: Chin-Yi LIN, Yu-Ming HSIEH, Fan-Tien CHENG, Hsien-Cheng HUANG
  • Patent number: 11378946
    Abstract: Embodiments of the present invention provide a predictive maintenance method for a component of a production tool, in which a time series prediction (TSP) algorithm and an information criterion algorithm are adapted to build a TSP model, thereby forecasting the complicated future trend of accidental shutdown of the component of the production tool. In addition, an alarm scheme is provided for performing maintenance immediately when the component is very likely to enter a dead state, and a death related indicator (DCI) is provided for quantitatively showing the possibility of the component entering the dead state.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: July 5, 2022
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Chin-Yi Lin, Yu-Ming Hsieh, Fan-Tien Cheng, Hsien-Cheng Huang
  • Publication number: 20200341459
    Abstract: Embodiments of the present invention provide a predictive maintenance method for a component of a production tool, in which a time series prediction (TSP) algorithm and an information criterion algorithm are adapted to build a TSP model, thereby forecasting the complicated future trend of accidental shutdown of the component of the production tool. In addition, an alarm scheme is provided for performing maintenance immediately when the component is very likely to enter a dead state, and a death related indicator (DCI) is provided for quantitatively showing the possibility of the component entering the dead state.
    Type: Application
    Filed: April 24, 2020
    Publication date: October 29, 2020
    Inventors: Chin-Yi LIN, Yu-Ming HSIEH, Fan-Tien CHENG, Hsien-Cheng HUANG
  • Patent number: 10682560
    Abstract: A strike exerciser structure includes: a first rubber pad, defined with a swing space; a second rubber pad, in movable connection with one side of the first rubber pad and positioned inside the swing space, the second rubber pad including a swing portion and connection portion, the connection portion in connection with the first rubber pad, and the swing portion extended from one side of the connection portion; a rod, one end thereof in connection with the swing portion; and a placement portion, configured on one end of the rod away from the swing portion, allowing a placement of a ball. Whereby, if a user uses a bat to hit the rod or drive the rod to move with a swing force upon a strike exercise, the swing portion will be oscillated with the connection portion as a fulcrum and spring back to its original position, thereby increasing service life.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: June 16, 2020
    Assignee: HTY SPORTS CO., LTD.
    Inventor: Hsien-Cheng Huang
  • Patent number: 8983644
    Abstract: A manufacturing execution system (MES) with virtual-metrology capabilities and a manufacturing system including the MES are provided. The MES is built on a middleware architecture (such as an object request broker architecture), and includes an equipment manager, a virtual metrology system (VMS), a statistical process control (SPC) system, an alarm manager and a scheduler. The manufacturing system includes a first process tool, a second process tool, a metrology tool, the aforementioned MES, a first R2R (Run-to-Run) controller and a second R2R controller.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: March 17, 2015
    Assignee: National Cheng Kung University
    Inventors: Fan-Tien Cheng, Chi-An Kao, Hsien-Cheng Huang, Yung-Cheng Chang
  • Patent number: 8095484
    Abstract: A server, a system and a method for automatic virtual metrology (AVM) are disclosed. The AVM system comprises a model-creation server and a plurality of AVM servers. The model-creation server is used to construct the first set of virtual metrology (VM) models (of a certain equipment type) including a VM conjecture model, a RI (Reliance Index) model, a GSI (Global Similarity Index) model, a DQIx (Process Data Quality Index) model, and a DQIy (Metrology Data Quality Index) model. In the AVM method, the model-creation server also can fan out or port the first set of VM models generated to other AVM servers of the same process apparatus (equipment) type, and each individual fan-out-acceptor's AVM server can perform automatic model refreshing processes so as to gain and maintain its VM models' accuracy.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: January 10, 2012
    Assignee: National Cheng Kung University
    Inventors: Fan-Tien Cheng, Hsien-Cheng Huang, Yi-Ting Huang, Jia-Mau Jian
  • Publication number: 20110251707
    Abstract: A manufacturing execution system (MES) with virtual-metrology capabilities and a manufacturing system including the MES are provided. The MES is built on a middleware architecture (such as an object request broker architecture), and includes an equipment manager, a virtual metrology system (VMS), a statistical process control (SPC) system, an alarm manager and a scheduler. The manufacturing system includes a first process tool, a second process tool, a metrology tool, the aforementioned MES, a first R2R (Run-to-Run) controller and a second R2R controller.
    Type: Application
    Filed: May 20, 2010
    Publication date: October 13, 2011
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Fan-Tien CHENG, Chi-An KAO, Hsien-Cheng HUANG, Yung-Cheng CHANG
  • Publication number: 20090292386
    Abstract: A server, a system and a method for automatic virtual metrology (AVM) are disclosed. The AVM system comprises a model-creation server and a plurality of AVM servers. The model-creation server is used to construct the first set of virtual metrology (VM) models (of a certain equipment type) including a VM conjecture model, a RI (Reliance Index) model, a GSI (Global Similarity Index) model, a DQIx (Process Data Quality Index) model, and a DQIy (Metrology Data Quality Index) model. In the AVM method, the model-creation server also can fan out or port the first set of VM models generated to other AVM servers of the same process apparatus (equipment) type, and each individual fan-out-acceptor's AVM server can perform automatic model refreshing processes so as to gain and maintain its VM models' accuracy.
    Type: Application
    Filed: September 10, 2008
    Publication date: November 26, 2009
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Fan-Tien Cheng, Hsien-Cheng Huang, Yi-Ting Huang, Jia-Mau Jian
  • Patent number: 7603328
    Abstract: A dual-phase virtual metrology method is disclosed for considering both promptness and accuracy by generating dual-phase virtual metrology (VM) values, wherein a Phase-I conjecture step emphasizes promptness by immediately calculating the Phase-I virtual metrology value (VMI) of a workpiece once the entire process data of the workpiece are completely collected; and a Phase-II conjecture step intensifies accuracy, which does not re-calculate the Phase-II virtual metrology values (VMII) of all the workpieces in the cassette until an actual metrology value (required for tuning or re-training purposes) of a selected workpiece in the same cassette is collected. Besides, the accompanying reliance index (RI) and global similarity index (GSI) of each VMI and VMII are also generated.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: October 13, 2009
    Assignee: National Cheng Kung University
    Inventors: Fan-Tien Cheng, Hsien-Cheng Huang, Chi-An Kao
  • Publication number: 20080306625
    Abstract: A dual-phase virtual metrology method is disclosed for considering both promptness and accuracy by generating dual-phase virtual metrology (VM) values, wherein a Phase-I conjecture step emphasizes promptness by immediately calculating the Phase-I virtual metrology value (VMI) of a workpiece once the entire process data of the workpiece are completely collected; and a Phase-II conjecture step intensifies accuracy, which does not re-calculate the Phase-II virtual metrology values (VMII) of all the workpieces in the cassette until an actual metrology value (required for tuning or re-training purposes) of a selected workpiece in the same cassette is collected. Besides, the accompanying reliance index (RI) and global similarity index (GSI) of each VMI and VMII are also generated.
    Type: Application
    Filed: July 18, 2007
    Publication date: December 11, 2008
    Applicant: National Cheng Kung University
    Inventors: Fan-Tien Cheng, Hsien-Cheng Huang, Chi-An Kao