Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a transistor and a heat dissipation structure. The substrate includes first and second semiconductor layers, and includes an insulating layer disposed between the first and second semiconductor layers. The substrate has a recess extending into the insulating layer from a surface of the first semiconductor layer. The transistor includes a hetero-junction structure, a gate electrode, a drain electrode and a source electrode. The hetero-junction structure is disposed on the second semiconductor layer. The gate, drain and source electrodes are disposed over the hetero-junction structure. The gate electrode is located between the drain electrode and the source electrode, and an active area of the hetero-junction structure located between the drain electrode and the source electrode is overlapped with the recess of the substrate.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a transistor and a heat dissipation structure. The substrate includes first and second semiconductor layers, and includes an insulating layer disposed between the first and second semiconductor layers. The substrate has a recess extending into the insulating layer from a surface of the first semiconductor layer. The transistor includes a hetero-junction structure, a gate electrode, a drain electrode and a source electrode. The hetero-junction structure is disposed on the second semiconductor layer. The gate, drain and source electrodes are disposed over the hetero-junction structure. The gate electrode is located between the drain electrode and the source electrode, and an active area of the hetero-junction structure located between the drain electrode and the source electrode is overlapped with the recess of the substrate.

Abstract: A manufacturing method of a high electron mobility transistor includes providing an epitaxial stacked structure, wherein the epitaxial stacked structure includes a semiconductor substrate, a buffer layer formed on the semiconductor substrate, a channel layer formed on the buffer layer, an intermediate layer formed on the channel layer, and a barrier layer formed on the intermediate layer; forming a source and a drain on the barrier layer; performing a microwave annealing process, wherein the conditions of the microwave annealing process include a temperature between 450° C. and 550° C., a frequency between 5.8 GHz and 6.2 GHz, and a time between 150 seconds and 250 seconds; and forming a gate on the barrier layer between the source and the drain.

Abstract: A high electron mobility transistor comprises a substrate, an epitaxial stack arranged above the substrate and having a first region and a second region surrounding the first region, a matrix electrode structure arranged in the first region, and a plurality of first bridges electrically connecting the plurality of second electrodes. The matrix electrode structure comprises a plurality of first electrodes arranged on the epitaxial stack and a plurality of second electrodes arranged on the epitaxial stack and adjacent to the plurality of first electrodes. One of the bridges is arranged between two of the second electrodes and crossed over one of the first electrodes.

Abstract: A high electron mobility transistor comprises a substrate, an epitaxial stack arranged above the substrate and having a first region and a second region surrounding the first region, a matrix electrode structure arranged in the first region, and a plurality of first bridges electrically connecting the plurality of second electrodes. The matrix electrode structure comprises a plurality of first electrodes arranged on the epitaxial stack and a plurality of second electrodes arranged on the epitaxial stack and adjacent to the plurality of first electrodes. One of the bridges is arranged between two of the second electrodes and crossed over one of the first electrodes.

Abstract: A High Electron Mobility Transistor (HEMT) device, which is formed by connecting a plurality of low power flip-chip type High Electron Mobility Transistor (HEMT) elements in parallel, or connected them in parallel and in series in combination into a tree-shaped structure, and then connecting said structure to an input terminal and an output terminal. Distances between each of the flip-chip type HEMT elements, from each element to said input terminal, and from each element to said output terminal are designed to be equal, such that powers consumed by each of the flip-chip type HEMT elements are equal, currents flowing through are evenly distributed, and heat generated is liable to be dissipated. A spike leakage protection layer, such as zinc-oxide (ZnO) amorphous layer or poly-crystal layer, is further included, hereby further enhancing the efficiency of said flip-chip type HEMT element and prolonging its service life.

Abstract: An oxidized low density lipoprotein sensing device for a gallium nitride process is a GaN HEMT device including: a gateless AlGaN/GaN sensing transistor device, a testing window, a source, a drain, two metal connecting wires and a passivation layer. The gateless AlGaN/GaN sensing transistor device has an epitaxial wafer structure including a GaN layer and an aluminum gallium nitride layer. The testing window is disposed on the epitaxial wafer structure. The metal connecting wire is disposed on a source and a drain. The passivation layer is covered onto a surface of the sensing device except the testing window. A built-in piezoelectric field is created by the properties of FET and the polarization effect of AlGaN/GaN to achieve the effect of sensing the level of oxidizing proteins in human body quickly, accurately and easily.

Abstract: A multi-layer structure with a transparent gate includes a MHEMT device structure comprising a GaAs substrate, a Schottky layer and a cap layer formed on the Schottky layer; a transparent gate formed on the Schottky layer being an indium tin oxide, ITO; and a drain and a source formed on the cap layer. Moreover, the MHEMT device structure includes a graded buffer, a buffer layer, a first spacer layer, a channel layer, and a second spacer layer formed between the GaAs substrate and the Schottky layer in a stacked fashion. The multi-layer structure is a transparent gate HEMT employing indium tin oxide which can make HEMT more sensitive to the light wave.

Abstract: This invention relates to a method of sulfuration treatment for InAlAs/InGaAs metamorphic high electron mobility transistor (MHEMT), and the sulfuration treatment is applied to the InAlAs/InGaAs MHEMT for a passivation treatment for Gate, in order to increase initial voltage, lower the surface states and decrease surface leakage current, which makes the MHEMT work in a range of high current density and high input power.

Abstract: A multi-layer structure with a transparent gate includes a MHEMT device structure comprising a GaAs substrate, a Schottky layer and a cap layer formed on the Schottky layer; a transparent gate formed on the Schottky layer being an indium tin oxide, ITO; and a drain and a source formed on the cap layer. Moreover, the MHEMT device structure includes a graded buffer, a buffer layer, a first spacer layer, a channel layer, and a second spacer layer formed between the GaAs substrate and the Schottky layer in a stacked fashion. The multi-layer structure is a transparent gate HEMT employing indium tin oxide which can make HEMT more sensitive to the light wave.

Abstract: This invention relates to a method for making a high-linearity and high-power CMOS structure and particularly to a field plate technology that is applied to a CMOS component, in which the field plate is formed on a dielectric layer of the CMOS, being arranged above a gate and a drain. An electric field is provided to significantly improve the RF linearity and output power of the CMOS component.

Abstract: This invention relates to a method of sulfuration treatment for InAlAs/InGaAs metamorphic high electron mobility transistor (MHEMT), and the sulfuration treatment is applied to the InAlAs/InGaAs MHEMT for a passivation treatment for Gate, in order to increase initial voltage, lower the surface states and decrease surface leakage current, which makes the MHEMT work in a range of high current density and high input power.

Abstract: This invention relates to a high-linearity and high-power CMOS structure and a method for the same and particularly to a field plate technology that is applied to a CMOS component, in which the field plate is formed on a dielectric layer of the CMOS, being arranged above a gate and a drain. An electric field is provided to significantly improve the RF linearity and output power of the CMOS component.

Abstract: A GaAs semiconductor device comprising a FET (field effect transistor), and a low dielectric constant passivation. The passivation protects the surface of the active area of the FET under the FET. The FET is a high electron mobility transistor or a pseudomorphic high electron mobility transistor. The passivation is formed by spin coating and made of a low dielectric constant compound. The low dielectric constant compound is Benzocyclobutene. Advantages are a simple manufacturing process, fewer surface defects, and improved device performance. Therefore, a superior device is provided at a reduced production cost.