Patents by Inventor Hsien-Feng LIAO

Hsien-Feng LIAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230387103
    Abstract: A semiconductor structure is provided. At least one first well region is disposed in a semiconductor substrate and has a first conductivity type. At least one gate of a transistor is disposed over the first well region and extends in a first direction. At least one second well region and at least one third well region are disposed on opposite sides of the first well region and extend in the first direction. The second and third well regions have a second conductivity type. A first shielding structure is disposed on at least one end of the gate and partially overlaps the first well region in a vertical projection direction. The first shielding structure is separated from the end of the gate. A bulk ring is disposed in the semiconductor substrate and surrounds the gate, the second well region, the third well region, and the first shielding structure.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsien-Feng LIAO, Jian-Hsing LEE, Chieh-Yao CHUANG, Ting-Yu CHANG, Yeh-Ning JOU, Shao-Chang HUANG, Kan-Sen CHEN, Nai-Lun CHENG, Ching-Yi HSU, Yu-Chen WU
  • Patent number: 11811222
    Abstract: An electrostatic discharge (ESD) protection circuit including a detection circuit, a voltage-divider element, and a discharge element is provided. The detection circuit is coupled between a first power line and a second power line. In response to an ESD event, the detection circuit enables a turn-on signal. The voltage-divider element is coupled between the first power line and a third power line and receives the turn-on signal. The discharge element is coupled between the second and third power lines. In response to the turn-on signal being enabled, the first discharge element discharges an ESD current.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: November 7, 2023
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Yeh-Ning Jou, Chieh-Yao Chuang, Hsien-Feng Liao, Ting-Yu Chang, Chih-Hsuan Lin, Chang-Min Lin, Shao-Chang Huang, Ching-Ho Li
  • Publication number: 20230335546
    Abstract: An ESD protection circuit includes a buffer circuit, a driving circuit, and a power-clamping circuit. The buffer circuit includes first and second transistors having a first conductivity type coupled in a cascade configuration between a first node and a first power supply node. A bonding pad is coupled to the first node. The drive circuit determines a state of at least one of the first and second transistors according to a control voltage. The drive circuit includes a third transistor having a second conductivity type, which is coupled between a second power supply node and a gate of the first transistor and is controlled by the control signal. The power-clamping circuit is coupled to the bonding pad and a gate of the third transistor at a second node. The control voltage is generated at the second node and determined by a voltage at the bonding pad.
    Type: Application
    Filed: April 14, 2022
    Publication date: October 19, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Kai-Chieh HSU, Chi-Hung LO, Wei-Sung CHEN, Chieh-Yao CHUANG, Hsien-Feng LIAO, Yeh-Ning JOU
  • Publication number: 20230198250
    Abstract: An electrostatic discharge (ESD) protection circuit including a detection circuit, a voltage-divider element, and a discharge element is provided. The detection circuit is coupled between a first power line and a second power line. In response to an ESD event, the detection circuit enables a turn-on signal. The voltage-divider element is coupled between the first power line and a third power line and receives the turn-on signal. The discharge element is coupled between the second and third power lines. In response to the turn-on signal being enabled, the first discharge element discharges an ESD current.
    Type: Application
    Filed: December 16, 2021
    Publication date: June 22, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Yeh-Ning JOU, Chieh-Yao CHUANG, Hsien-Feng LIAO, Ting-Yu CHANG, Chih-Hsuan LIN, Chang-Min LIN, Shao-Chang HUANG, Ching-Ho LI
  • Patent number: 11569657
    Abstract: The protection circuit includes a detection circuit and a discharge circuit. The detection circuit is coupled to first and second power bonding pads and detects whether an ESD event or an EOS event occurs at the first power bonding pad. The detection circuit controls a detection voltage on a detection node according to a detection result. The first and second power bonding pads belong to different power domains. The discharge circuit is coupled to the detection node and the first power pad. In response to the ESD event occurring at the first power bonding pad, the discharge circuit provides a discharge path between the first power bonding pad and a ground terminal according to the detection voltage. In response to the EOS event occurring at the first power bonding pad, the detection circuit activates a second discharge path between the first power bonding pad and the ground terminal.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: January 31, 2023
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang Huang, Ching-Ho Li, Hsien-Feng Liao, Chieh-Yao Chuang, Yeh-Ning Jou
  • Patent number: 11545481
    Abstract: An electrostatic discharge protection device includes a first well region, a second well region, a first doped region, and a first heavily doped region. The first well region and the second well region are disposed in a semiconductor substrate. The first doped region is disposed in the first well region and the second well region. The first heavily doped region is disposed in the first doped region in the first well region. The first well region and the first doped region have a first conductivity type, and the second well region and the first heavily doped region have a second conductivity type that is the opposite of the first conductivity type.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: January 3, 2023
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Yeh-Ning Jou, Hsien-Feng Liao, Jia-Rong Yeh
  • Patent number: 11088541
    Abstract: An electrostatic discharge protection circuit is provided. The electrostatic discharge protection circuit includes an electrostatic discharge detection circuit, a discharge circuit, and a switch. The electrostatic discharge detection circuit detects whether an electrostatic discharge event occurs at the bounding pad to generate a first detection circuit. The discharge circuit receives the first detection signal. When the electrostatic discharge event occurs at the bounding pad, the discharge circuit provides a discharge path between the bounding pad and a ground terminal according to the first detection signal. The switch is coupled between the core circuit and the ground terminal and controlled by the first detection signal. When the electrostatic discharge event occurs at the bounding pad, the switch is turned off according to the first detection signal.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: August 10, 2021
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang Huang, Jia-Rong Yeh, Yeh-Ning Jou, Hsien-Feng Liao, Yi-Han Wu, Chih-Cherng Liao, Chieh-Yao Chuang, Wei-Shung Chen, Ching-Wen Chen, Pang-Chuan Chen
  • Publication number: 20200321328
    Abstract: An electrostatic discharge protection device includes a first well region, a second well region, a first doped region, and a first heavily doped region. The first well region and the second well region are disposed in a semiconductor substrate. The first doped region is disposed in the first well region and the second well region. The first heavily doped region is disposed in the first doped region in the first well region. The first well region and the first doped region have a first conductivity type, and the second well region and the first heavily doped region have a second conductivity type that is the opposite of the first conductivity type.
    Type: Application
    Filed: April 2, 2019
    Publication date: October 8, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Yeh-Ning JOU, Hsien-Feng LIAO, Jia-Rong YEH
  • Publication number: 20200083704
    Abstract: An electrostatic discharge protection circuit is provided. The electrostatic discharge protection circuit includes an electrostatic discharge detection circuit, a discharge circuit, and a switch. The electrostatic discharge detection circuit detects whether an electrostatic discharge event occurs at the bounding pad to generate a first detection circuit. The discharge circuit receives the first detection signal. When the electrostatic discharge event occurs at the bounding pad, the discharge circuit provides a discharge path between the bounding pad and a ground terminal according to the first detection signal. The switch is coupled between the core circuit and the ground terminal and controlled by the first detection signal. When the electrostatic discharge event occurs at the bounding pad, the switch is turned off according to the first detection signal.
    Type: Application
    Filed: September 7, 2018
    Publication date: March 12, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Jia-Rong YEH, Yeh-Ning JOU, Hsien-Feng LIAO, Yi-Han WU, Chih-Cherng LIAO, Chieh-Yao CHUANG, Wei-Shung CHEN, Ching-Wen CHEN, Pang-Chuan CHEN