Abstract: A liquid crystal panel and a manufacturing method thereof are provided. The liquid crystal panel includes a substrate, an electrode layer, an insulating layer, a first alignment layer, a second alignment layer, and a liquid crystal layer. The electrode layer is located on the substrate. The insulating layer is located on the electrode layer. The insulating layer has a cavity and an opening connected to a top portion of the cavity. The electrode layer is located below the cavity. The first alignment layer is located in the cavity and located on the electrode layer. The second alignment layer is located at the top portion of the cavity. Each of the liquid crystal layers is located in the cavity and between the first alignment layer and the second alignment layer.

Abstract: A liquid crystal panel and a manufacturing method thereof are provided. The liquid crystal panel includes a substrate, an electrode layer, an insulating layer, a first alignment layer, a second alignment layer, and a liquid crystal layer. The electrode layer is located on the substrate. The insulating layer is located on the electrode layer. The insulating layer has a cavity and an opening connected to a top portion of the cavity. The electrode layer is located below the cavity. The first alignment layer is located in the cavity and located on the electrode layer. The second alignment layer is located at the top portion of the cavity. Each of the liquid crystal layers is located in the cavity and between the first alignment layer and the second alignment layer.

Abstract: An active device array substrate includes: a substrate, a switch device, an inter-layer dielectric layer, an insulation bump, a conductive layer, and a pixel electrode. The switch device is located on the substrate. The inter-layer dielectric layer is located on the switch device, and the inter-layer dielectric layer has at least one opening, where the opening does not cover at least one part of a drain electrode of the switch device. The insulation bump covers at least partially the opening. The conductive layer is located on a top surface and a side wall of the insulation bump, and is electrically connected to the drain electrode of the switch device through the opening. The pixel electrode is electrically connected to the conductive layer.

Abstract: An active device array substrate includes: a substrate, a switch device, an inter-layer dielectric layer, an insulation bump, a conductive layer, and a pixel electrode. The switch device is located on the substrate. The inter-layer dielectric layer is located on the switch device, and the inter-layer dielectric layer has at least one opening, where the opening does not cover at least one part of a drain electrode of the switch device. The insulation bump covers at least partially the opening. The conductive layer is located on a top surface and a side wall of the insulation bump, and is electrically connected to the drain electrode of the switch device through the opening. The pixel electrode is electrically connected to the conductive layer.