Patents by Inventor Hsien-kai Tseng

Hsien-kai Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250095596
    Abstract: A display device including an element array substrate, an electrophoretic display substrate and a humidity sensor is provided. The electrophoretic display substrate is disposed on the element array substrate. The humidity sensor includes a conductive pattern disposed on a side of the element array substrate adjacent to the electrophoretic display substrate. A driving method of the display device is also provided.
    Type: Application
    Filed: August 5, 2024
    Publication date: March 20, 2025
    Applicant: E Ink Holdings Inc.
    Inventors: Hsien-Kai Tseng, Wei-Chen Tsai, Sheng-Wei Chen, Chi-Mao Hung
  • Publication number: 20240321901
    Abstract: A display device includes an array substrate and a driving circuit. The array substrate includes active elements, a first scan line, a second scan line, a third scan line disposed between the first scan line and the second scan line, and a first selection line electrically connected to the first scan line and the second scan line. The active elements include a first active element and a second active element electrically connected to the first scan line, and a third active element and a fourth active element electrically connected to the second scan line. The driving circuit provides a first scan signal transmitted to the first scan line and the second scan line through the first selection line to control the first active element, the second active element, the third active element and the fourth active element.
    Type: Application
    Filed: March 8, 2024
    Publication date: September 26, 2024
    Inventors: Hsien-Kai TSENG, Wei-Chen TSAI, Jia-Hung CHEN, Pei-Ju WU
  • Patent number: 8314423
    Abstract: A thin film transistor array substrate and a manufacturing method thereof are provided. In the manufacturing method, a first patterned conductive layer including a plurality of scan lines and a plurality of gates connected with the scan lines is formed on a substrate. A patterned gate insulating layer having a plurality of openings is then formed on the substrate to cover at least a portion of the first patterned conductive layer, and a plurality of dielectric patterns are formed in the openings. A plurality of semiconductor patterns are formed on the patterned gate insulating layer. A second patterned conductive layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A passivation layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A plurality of pixel electrodes are formed on the passivation layer.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: November 20, 2012
    Assignee: Au Optronics Corporation
    Inventors: Chien-Hung Chen, Lih-Hsiung Chan, Chin-Yueh Liao, Hsien-Kai Tseng
  • Publication number: 20100320466
    Abstract: A thin film transistor array substrate and a manufacturing method thereof are provided. In the manufacturing method, a first patterned conductive layer including a plurality of scan lines and a plurality of gates connected with the scan lines is formed on a substrate. A patterned gate insulating layer having a plurality of openings is then formed on the substrate to cover at least a portion of the first patterned conductive layer, and a plurality of dielectric patterns are formed in the openings. A plurality of semiconductor patterns are formed on the patterned gate insulating layer. A second patterned conductive layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A passivation layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A plurality of pixel electrodes are formed on the passivation layer.
    Type: Application
    Filed: September 16, 2009
    Publication date: December 23, 2010
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chien-Hung Chen, Lih-Hsiung Chan, Chin-Yueh Liao, Hsien-Kai Tseng
  • Patent number: 7776497
    Abstract: A mask including a transparent substrate, a non-transmitting layer, a first transmitting layer and a second transmitting layer is provided. The transparent substrate has a first region, a second region, and a third region. The non-transmitting layer is disposed in the first region of the transparent substrate. The first transmitting layer is disposed in the second region and the third region of the transparent substrate. The second transmitting layer is disposed on the first transmitting layer in the third region.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: August 17, 2010
    Assignee: Au Optronic Corp.
    Inventors: Chun-Hao Tung, Chia-Tsung Lee, Hsien-Kai Tseng, Shigekazu Horino
  • Patent number: 7704647
    Abstract: A mask and a manufacturing method thereof are provided. A transparent substrate having three regions is provided first. A non-transmitting layer is formed in a first region of the transparent substrate. Then, a first photoresist layer is formed on the transparent substrate, and the first photoresist layer exposes a second region of the transparent substrate. Next, a first transmitting layer is formed on the transparent substrate and the first photoresist layer. Finally, the first photoresist layer is removed. The first transmitting layer on the first photoresist layer is removed at the same time and the first transmitting layer in the second region of the transparent substrate is remained and a third region of the transparent substrate is exposed. A lift-off process is used in the mask manufacturing method of the present invention to form the transmitting layer.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: April 27, 2010
    Assignee: Au Optronics Corp.
    Inventors: Chun-Hao Tung, Chia-Tsung Lee, Hsien-Kai Tseng, Horino Shigekazu
  • Publication number: 20090317731
    Abstract: A mask including a transparent substrate, a non-transmitting layer, a first transmitting layer and a second transmitting layer is provided. The transparent substrate has a first region, a second region, and a third region. The non-transmitting layer is disposed in the first region of the transparent substrate. The first transmitting layer is disposed in the second region and the third region of the transparent substrate. The second transmitting layer is disposed on the first transmitting layer in the third region.
    Type: Application
    Filed: August 26, 2009
    Publication date: December 24, 2009
    Applicant: Au Optronics Corporation
    Inventors: CHUN-HAO TUNG, Chia-Tsung Lee, Hsien-Kai Tseng, Shigekazu Horino
  • Patent number: 7553707
    Abstract: The invention provides a novel technology where a TFT array substrate for a display device is formed with three photomasks. The invention is achieved by using the novel technology in combination with a well-known four-masks process. For the novel technology, during the lithography process where a photosensitive acrylic resin film is used to make contacts, taper patterns required for general through holes are formed simultaneously with a fine pattern formed in a light shielding area that is tapered more approximately to vertical, using a photomask with phase-shift effect. Thus the pixel electrode pattern can be separated without using lithography process in subsequent processes.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: June 30, 2009
    Assignees: Quanta Display, Inc., Quanta Display Japan, Inc.
    Inventors: Shigekazu Horino, Chun-hao Tung, Hsien-kai Tseng
  • Publication number: 20070059611
    Abstract: A mask and a manufacturing method thereof are provided. A transparent substrate having three regions is provided first. A non-transmitting layer is formed in a first region of the transparent substrate. Then, a first photoresist layer is formed on the transparent substrate, and the first photoresist layer exposes a second region of the transparent substrate. Next, a first transmitting layer is formed on the transparent substrate and the first photoresist layer. Finally, the first photoresist layer is removed. The first transmitting layer on the first photoresist layer is removed at the same time and the first transmitting layer in the second region of the transparent substrate is remained and a third region of the transparent substrate is exposed. A lift-off process is used in the mask manufacturing method of the present invention to form the transmitting layer.
    Type: Application
    Filed: May 31, 2006
    Publication date: March 15, 2007
    Inventors: Chun-Hao Tung, Chia-Tsung Lee, Hsien-Kai Tseng, Horino Shigekazu
  • Publication number: 20060186409
    Abstract: The invention provides a novel technology where a TFT array substrate for a display device is formed with three photomasks. The invention is achieved by using the novel technology in combination with a well-known four-masks process. For the novel technology, during the lithography process where a photosensitive acrylic resin film is used to make contacts, taper patterns required for general through holes are formed simultaneously with a fine pattern formed in a light shielding area that is tapered more approximately to vertical, using a photomask with phase-shift effect. Thus the pixel electrode pattern can be separated without using lithography process in subsequent processes.
    Type: Application
    Filed: February 9, 2006
    Publication date: August 24, 2006
    Inventors: Shigekazu Horino, Chun-hao Tung, Hsien-kai Tseng