Patents by Inventor Hsien-Kun Chiu
Hsien-Kun Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8541268Abstract: A thin film transistor and a method for manufacturing the same are provided. A top-gate thin film transistor is fabricated by a process using two gray-tone photomasks and a lift-off method. Therefore, the method can save cost of photomasks and processes comparing to a conventional fabrication method.Type: GrantFiled: December 9, 2011Date of Patent: September 24, 2013Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Chan-Chang Liao, Hsien-Kun Chiu, Wei-Pang Yen, Chao-Huan Hsu
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Patent number: 8420420Abstract: A method of manufacturing a thin film transistor array substrate and a structure of the same are disclosed. The manufacturing method merely requires two steps of mask fabrication to accomplish the manufacture of thin film transistor array, in which the manufacturing method utilizes a first mask fabrication step to define a pattern of a source electrode and a drain electrode of the thin film transistor, and a partially-exposed dielectric layer, and utilizes a second mask fabrication step to define an arrangement of a transparent conductive layer. The manufacturing method and structure can dramatically reduce the manufacturing cost of masks and simplify the whole manufacturing process.Type: GrantFiled: May 21, 2011Date of Patent: April 16, 2013Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Wei-pang Yen, Hsien-kun Chiu, Chan-chang Liao, Chao-huan Hsu
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Patent number: 8421096Abstract: A pixel structure and a manufacturing method thereof and a display panel are provided. An electrode material layer, a shielding material layer, an inter-layer dielectric material layer, a semiconductor material layer and a photoresist-layer are sequentially formed on a substrate. The semiconductor material layer, the inter-layer dielectric material layer, the shielding material layer and the electrode material layer are patterned using the photoresist-layer as a mask to form a semiconductor pattern, an inter-layer dielectric pattern, a shielding pattern and a pixel electrode. A source/drain electrically connected to the pixel electrode and covering a portion of the semiconductor pattern is formed on the pixel electrode. A channel is another portion of the semiconductor uncovered by the source/drain.Type: GrantFiled: July 30, 2012Date of Patent: April 16, 2013Assignee: Chunghwa Picture Tubes, Ltd.Inventor: Hsien-Kun Chiu
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Publication number: 20130087792Abstract: The present invention provides a method of making a pixel structure of a reflective type electrophoretic display device. First, a first metal pattern layer, an insulating layer, a semiconductor pattern layer and a second metal pattern layer are formed sequentially on a substrate. Next, a passivation layer is formed on the substrate, the semiconductor pattern layer and the second metal pattern layer, and an organic photoresist layer is formed on the passivation layer, wherein the organic photoresist layer has a first contact hole exposing the passivation layer. Then, the organic photoresist layer is utilized as a mask to remove the exposed passivation layer and to form a second contact hole in the passivation layer to expose the second metal pattern layer. Subsequently, a third metal pattern layer and a transparent conductive pattern are formed sequentially on the organic photoresist pattern layer and the exposed second metal pattern layer.Type: ApplicationFiled: March 29, 2012Publication date: April 11, 2013Inventors: Hsien-Kun Chiu, Yi-Wei Lin, Ming-Tsung Chung, Ying-Tsung Tu
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Publication number: 20130015445Abstract: A thin film transistor and a method for manufacturing the same are provided. A top-gate thin film transistor is fabricated by a process using two gray-tone photomasks and a lift-off method. Therefore, the method can save cost of photomasks and processes comparing to a conventional fabrication method.Type: ApplicationFiled: December 9, 2011Publication date: January 17, 2013Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventors: Chan-Chang Liao, Hsien-Kun Chiu, Wei-Pang Yen, Chao-Huan Hsu
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Publication number: 20120286277Abstract: A pixel structure and a manufacturing method thereof and a display panel are provided. An electrode material layer, a shielding material layer, an inter-layer dielectric material layer, a semiconductor material layer and a photoresist-layer are sequentially formed on a substrate. The semiconductor material layer, the inter-layer dielectric material layer, the shielding material layer and the electrode material layer are patterned using the photoresist-layer as a mask to form a semiconductor pattern, an inter-layer dielectric pattern, a shielding pattern and a pixel electrode. A source/drain electrically connected to the pixel electrode and covering a portion of the semiconductor pattern is formed on the pixel electrode. A channel is another portion of the semiconductor uncovered by the source/drain.Type: ApplicationFiled: July 30, 2012Publication date: November 15, 2012Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventor: Hsien-Kun Chiu
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Publication number: 20120261666Abstract: A method of manufacturing a thin film transistor array substrate and a structure of the same are disclosed. The manufacturing method merely requires two steps of mask fabrication to accomplish the manufacture of thin film transistor array, in which the manufacturing method utilizes a first mask fabrication step to define a pattern of a source electrode and a drain electrode of the thin film transistor, and a partially-exposed dielectric layer, and utilizes a second mask fabrication step to define an arrangement of a transparent conductive layer. The manufacturing method and structure can dramatically reduce the manufacturing cost of masks and simplify the whole manufacturing process.Type: ApplicationFiled: May 21, 2011Publication date: October 18, 2012Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventors: WEI-PANG YEN, Hsien-kun Chiu, Chan-chang Liao, Chao-huan Hsu
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Patent number: 8263447Abstract: A pixel structure and a manufacturing method thereof and a display panel are provided. An electrode material layer, a shielding material layer, an inter-layer dielectric material layer, a semiconductor material layer and a photoresist-layer are sequentially formed on a substrate. The semiconductor material layer, the inter-layer dielectric material layer, the shielding material layer and the electrode material layer are patterned using the photoresist-layer as a mask to form a semiconductor pattern, an inter-layer dielectric pattern, a shielding pattern and a pixel electrode. A source/drain electrically connected to the pixel electrode and covering a portion of the semiconductor pattern is formed on the pixel electrode. A channel is another portion of the semiconductor uncovered by the source/drain.Type: GrantFiled: August 28, 2009Date of Patent: September 11, 2012Assignee: Chunghwa Picture Tubes, Ltd.Inventor: Hsien-Kun Chiu
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Patent number: 7943441Abstract: A method of forming a thin-film transistor array substrate is provided. A first mask is used to define a source, a drain and a channel on a substrate. A dielectric layer is formed to cover the source, the drain, the channel and the substrate. A second mask is used to define a patterned photoresist and the dielectric layer. A transparent conductive layer is formed to cover the patterned photoresist and the substrate. A lift-off process is performed to remove the patterned photoresist and a portion of the transparent conductive layer disposed on the patterned photoresist. A third mask is used to define a gate disposed on the dielectric layer.Type: GrantFiled: October 18, 2009Date of Patent: May 17, 2011Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Chan-Chang Liao, Hsien-Kun Chiu, Wei-Pang Yen, Chao-Huan Hsu, Kun-Yuan Huang
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Publication number: 20110014753Abstract: A method of forming a thin-film transistor array substrate is provided. A first mask is used to define a source, a drain and a channel on a substrate. A dielectric layer is formed to cover the source, the drain, the channel and the substrate. A second mask is used to define a patterned photoresist and the dielectric layer. A transparent conductive layer is formed to cover the patterned photoresist and the substrate. A lift-off process is performed to remove the patterned photoresist and a portion of the transparent conductive layer disposed on the patterned photoresist. A third mask is used to define a gate disposed on the dielectric layer.Type: ApplicationFiled: October 18, 2009Publication date: January 20, 2011Inventors: Chan-Chang Liao, Hsien-Kun Chiu, Wei-Pang Yen, Chao-Huan Hsu, Kun-Yuan Huang
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Publication number: 20100314634Abstract: A pixel structure and a manufacturing method thereof and a display panel are provided. An electrode material layer, a shielding material layer, an inter-layer dielectric material layer, a semiconductor material layer and a photoresist-layer are sequentially formed on a substrate. The semiconductor material layer, the inter-layer dielectric material layer, the shielding material layer and the electrode material layer are patterned using the photoresist-layer as a mask to form a semiconductor pattern, an inter-layer dielectric pattern, a shielding pattern and a pixel electrode. A source/drain electrically connected to the pixel electrode and covering a portion of the semiconductor pattern is formed on the pixel electrode. A channel is another portion of the semiconductor uncovered by the source/drain.Type: ApplicationFiled: August 28, 2009Publication date: December 16, 2010Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventor: Hsien-Kun Chiu
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Publication number: 20090085032Abstract: A method of fabricating a pixel structure is provided. First, a semiconductor material layer and a first conductive layer are sequentially formed on a substrate. Next, a first patterned photoresist layer with a fillister is formed on the first conductive layer by a first mask. A semiconductor layer, a drain, and a source are formed by the first patterned photoresist layer. After removing the first patterned photoresist layer, a dielectric material layer covering the source, the drain, and the semiconductor layer is formed. A second conductive layer is formed on the dielectric material layer. Then, a second patterned photoresist layer with a salient is formed on the second conductive layer by a second mask. A gate and a dielectric layer are formed by the second patterned photoresist layer. After removing the second patterned photoresist layer, a pixel electrode electrically connected to the drain is formed above the substrate.Type: ApplicationFiled: January 15, 2008Publication date: April 2, 2009Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventors: Hsien-Kun Chiu, Chin-Chuan Lai, Shau-Lin Lyu
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Patent number: 7473642Abstract: A method for fabricating a conductive layer is provided. First, a substrate is provided and a patterned adhesion layer is formed on the substrate. Next, a chemical plating process is performed to form a first metal layer on the patterned adhesion layer by placing the substrate in an electroplating solution and the electroplating solution is shocked. Thereafter, a second metal layer is formed on the first metal layer by performing a plating process.Type: GrantFiled: June 12, 2007Date of Patent: January 6, 2009Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Hsien-Kun Chiu, Chin-Chuan Lai, Yi-Pen Lin, Shu-Chen Yang
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Publication number: 20080233739Abstract: A method for fabricating a conductive layer is provided. First, a substrate is provided and a patterned adhesion layer is formed on the substrate. Next, a chemical plating process is performed to form a first metal layer on the patterned adhesion layer by placing the substrate in an electroplating solution and the electroplating solution is shocked. Thereafter, a second metal layer is formed on the first metal layer by performing a plating process.Type: ApplicationFiled: June 12, 2007Publication date: September 25, 2008Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventors: Hsien-Kun Chiu, Chin-Chuan Lai, Yi-Pen Lin, Shu-Chen Yang
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Publication number: 20070231974Abstract: A thin film transistor having a substrate, a bottom layer, a gate, a gate-insulating layer, a channel layer and a source/drain, is provided. The bottom layer is disposed on the substrate. The copper gate is disposed on the bottom layer. The gate-insulating layer covers the copper gate and the bottom layer. The channel layer is disposed on the gate-insulating layer and above the gate. The source/drain is disposed at two sides of the channel layer which is above the gate. By disposing the bottom layer, the problem of poor adhesion between the copper gate and the substrate can be solved.Type: ApplicationFiled: March 30, 2006Publication date: October 4, 2007Inventors: Hsien-Kun Chiu, Yung-Chia Kuan, Kuo-Sheng Sun