Patents by Inventor Hsien-Ping Peng

Hsien-Ping Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160150649
    Abstract: An integrated passive module comprises a ceramic substrate, a planar layer and a thin film laminate. At least one first passive component is embedded in ceramic substrate. The planar layer is disposed on the ceramic substrate. The thin film laminate comprises at least one second passive component and disposed on the planar layer. The thin film laminate is electrically connected to the first passive component. This disclosure also discloses a semiconductor device comprising an integrated passive module and at least one active component. The at least one active component is electrically connected to the first passive component and the second passive component.
    Type: Application
    Filed: November 25, 2015
    Publication date: May 26, 2016
    Inventor: Hsien-Ping PENG
  • Publication number: 20060213778
    Abstract: A method of electroplating conductive material on semiconductor wafers improves deposited film quality by providing greater control over the formation of the film grain structure. Better grain size control is achieved by applying a continuous DC plating current to the wafer which avoids sharp discontinuities in the current as the applied current is increased in successive stages during a plating cycle. Current discontinuities are avoided by gradually increasing the current in a ramp-like fashion between the successive plating stages.
    Type: Application
    Filed: March 23, 2005
    Publication date: September 28, 2006
    Inventors: Hsi-Kuei Cheng, Steven Lin, Chih-Chang Huang, Tzu-Ling Liao, Hsien-Ping Peng, Ming-Yuan Cheng, Ying-Jing Lu, Chieh-Tsao Wang, Ray Chuang, Chen-Peng Fan