Patents by Inventor Hsien-Wen Chen
Hsien-Wen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240135745Abstract: An electronic device has a narrow viewing angle state and a wide viewing angle state, and includes a panel and a light source providing a light passing through the panel. In the narrow viewing angle state, the light has a first relative light intensity and a second relative light intensity. The first relative light intensity is the strongest light intensity, the second relative light intensity is 50% of the strongest light intensity, the first relative light intensity corresponds to an angle of 0°, the second relative light intensity corresponds to a half-value angle, and the half-value angle is between ?15° and 15°. In the narrow angle state, a third relative light intensity at each angle between 20° and 60° or each angle between ?20° and ?60° is lower than 20% of the strongest light intensity.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Applicant: InnnoLux CorporationInventors: Kuei-Sheng Chang, Po-Yang Chen, Kuo-Jung Wu, I-An Yao, Wei-Cheng Lee, Hsien-Wen Huang
-
Patent number: 10403596Abstract: A package structure includes a dielectric layer having opposing first and second surfaces, a wiring layer formed on the first surface and having a plurality of conducive vias that penetrate the dielectric layer, an electronic component disposed on the first surface of the dielectric layer and electrically connected to the wiring layer, an encapsulant encapsulating the electronic component, and a packaging substrate disposed on the second surface and electrically connected to the conductive vias. With the dielectric layer in replacement of a conventional silicon board and the wiring layer as a signal transmission medium between the electronic component and the packaging substrate, the package structure does not need through-silicon vias. Therefore, the package structure has a simple fabrication process and a low fabrication cost. The present invention further provides a method of fabricating the package structure.Type: GrantFiled: April 10, 2018Date of Patent: September 3, 2019Assignee: Siliconware Precision Indsutries Co., Ltd.Inventors: Hsien-Wen Chen, Shih-Ching Chen, Chieh-Lung Lai
-
Patent number: 10249562Abstract: A method for fabricating a package structure is provided, which includes the steps of: providing a carrier having a recess; disposing an electronic element in the recess of the carrier; forming an insulating layer in the recess to encapsulate the electronic element; forming a circuit structure on the carrier, wherein the circuit structure is electrically connected to the electronic element; forming a plurality of through holes penetrating the carrier; and forming a conductive material in the through holes to form a plurality of conductors, wherein the conductors are electrically connected to the circuit structure. By using the carrier as a substrate body, the present invention avoids warping of the package structure.Type: GrantFiled: January 30, 2015Date of Patent: April 2, 2019Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Ching-Wen Chiang, Kuang-Hsin Chen, Hsien-Wen Chen
-
Patent number: 10199320Abstract: A method of fabricating an electronic package is provided, including: providing a carrier body having a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since temporary material is required. The present invention further provides the electronic package thus fabricated.Type: GrantFiled: October 16, 2017Date of Patent: February 5, 2019Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Ching-Wen Chiang, Kuang-Hsin Chen, Sheng-Li Lu, Hsien-Wen Chen
-
Publication number: 20180233478Abstract: A package structure includes a dielectric layer having opposing first and second surfaces, a wiring layer formed on the first surface and having a plurality of conducive vias that penetrate the dielectric layer, an electronic component disposed on the first surface of the dielectric layer and electrically connected to the wiring layer, an encapsulant encapsulating the electronic component, and a packaging substrate disposed on the second surface and electrically connected to the conductive vias. With the dielectric layer in replacement of a conventional silicon board and the wiring layer as a signal transmission medium between the electronic component and the packaging substrate, the package structure does not need through-silicon vias. Therefore, the package structure has a simple fabrication process and a low fabrication cost. The present invention further provides a method of fabricating the package structure.Type: ApplicationFiled: April 10, 2018Publication date: August 16, 2018Inventors: Hsien-Wen Chen, Shih-Ching Chen, Chieh-Lung Lai
-
Patent number: 10049973Abstract: A substrate structure is provided, which includes: a substrate body having opposite first and second surfaces; a plurality of conductive posts formed on the first surface of the substrate body and electrically connected to the substrate body; and a dielectric layer formed on the first surface of the substrate body for encapsulating the conductive posts, wherein one end surfaces of the conductive posts are exposed from the dielectric layer. Therefore, the present invention replaces the conventional silicon substrate with the dielectric layer so as to eliminate the need to fabricate the conventional TSVs (Through Silicon Vias) and thereby greatly reduce the fabrication cost. The present invention further provides an electronic package having the substrate structure and a fabrication method thereof.Type: GrantFiled: December 30, 2015Date of Patent: August 14, 2018Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Ching-Wen Chiang, Kuang-Hsin Chen, Hsien-Wen Chen
-
Publication number: 20180040550Abstract: A method of fabricating an electronic package is provided, including: providing a carrier body having a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since temporary material is required. The present invention further provides the electronic package thus fabricated.Type: ApplicationFiled: October 16, 2017Publication date: February 8, 2018Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Ching-Wen Chiang, Kuang-Hsin Chen, Sheng-Li Lu, Hsien-Wen Chen
-
Patent number: 9875949Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second sides; at least an electronic element disposed on the first side of the circuit structure; an encapsulant formed on the first side of the circuit structure for encapsulating the electronic element; a dielectric layer formed on portions of the second side of the circuit structure; and a metal structure formed on the dielectric layer and the circuit structure. The metal structure has a first metal layer bonded to the circuit structure and a second metal layer formed on the first metal layer and the dielectric layer. Therefore, by replacing a conventional silicon interposer with the circuit structure, the invention eliminates the need to fabricate through silicon vias so as to greatly reduce the fabrication difficulty and cost. The invention further provides a method for fabricating the electronic package.Type: GrantFiled: December 28, 2015Date of Patent: January 23, 2018Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Hsiao-Chun Huang, Hsien-Wen Chen, Shih-Ching Chen, Guang-Hwa Ma
-
Patent number: 9818683Abstract: A met of fabricating an electronic package is provided, including: providing a carrier body haying a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing a portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since no temporary material is required. The present invention further provides the electronic package thus fabricated.Type: GrantFiled: August 4, 2015Date of Patent: November 14, 2017Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Ching-Wen Chiang, Kuang-Hsin Chen, Sheng-Li Lu, Hsien-Wen Chen
-
Patent number: 9748183Abstract: A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first surface; an insulating extending body extending outward from an edge of the first surface of the insulating base body, wherein the insulating extending body is less in thickness than the insulating base body; an electronic element having opposite active and inactive surfaces and disposed in the opening with its inactive surface facing the insulating base body; a dielectric layer formed in the opening of the insulating base body and on the first surface of the insulating base body, the insulating extending body and the active surface of the electronic element; and a circuit layer formed on the dielectric layer and electrically connected to the electronic element. The configuration of the insulating layer of the invention facilitates to enhance the overall structural rigidity of the package.Type: GrantFiled: March 10, 2017Date of Patent: August 29, 2017Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Ching-Wen Chiang, Cheng-Hao Ciou, Cheng-Chieh Wu, Kuang-Hsin Chen, Hsien-Wen Chen
-
Publication number: 20170186703Abstract: A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first surface; an insulating extending body extending outward from an edge of the first surface of the insulating base body, wherein the insulating extending body is less in thickness than the insulating base body; an electronic element having opposite active and inactive surfaces and disposed in the opening with its inactive surface facing the insulating base body; a dielectric layer formed in the opening of the insulating base body and on the first surface of the insulating base body, the insulating extending body and the active surface of the electronic element; and a circuit layer formed on the dielectric layer and electrically connected to the electronic element. The configuration of the insulating layer of the invention facilitates to enhance the overall structural rigidity of the package.Type: ApplicationFiled: March 10, 2017Publication date: June 29, 2017Inventors: Ching-Wen Chiang, Cheng-Hao Ciou, Cheng-Chieh Wu, Kuang-Hsin Chen, Hsien-Wen Chen
-
Publication number: 20170148761Abstract: The present invention provides a semiconductor package and a method of fabricating the same, including: placing in a groove of a carrier a semiconductor element having opposing active and non-active surfaces, and side surfaces abutting the active surface and the non-active surface; applying an adhesive material in the groove and around a periphery of the side surfaces of the semiconductor element; forming a dielectric layer on the adhesive material and the active surface of the semiconductor element; forming on the dielectric layer a circuit layer electrically connected to the semiconductor element; and removing a first portion of the carrier below the groove to keep a second portion of the carrier on a side wall of the groove intact for the second portion to function as a supporting member. The present invention does not require formation of a silicon interposer, and therefore the overall cost of a final product is much reduced.Type: ApplicationFiled: January 6, 2017Publication date: May 25, 2017Inventors: Guang-Hwa Ma, Shih-Kuang Chiu, Shih-Ching Chen, Chun-Chi Ke, Chang-Lun Lu, Chun-Hung Lu, Hsien-Wen Chen, Chun-Tang Lin, Yi-Che Lai, Chi-Hsin Chiu, Wen-Tsung Tseng, Tsung-Te Yuan, Lu-Yi Chen, Mao-Hua Yeh
-
Publication number: 20170148716Abstract: A met of fabricating an electronic package is provided, g: providing a carrier body haying a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing a portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since no temporary material is required. The present invention further provides the electronic package thus fabricated.Type: ApplicationFiled: August 4, 2015Publication date: May 25, 2017Inventors: Ching-Wen Chiang, Kuang-Hsin Chen, Sheng-Li Lu, Hsien-Wen Chen
-
Patent number: 9627307Abstract: A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first surface; an insulating extending body extending outward from an edge of the first surface of the insulating base body, wherein the insulating extending body is less in thickness than the insulating base body; an electronic element having opposite active and inactive surfaces and disposed in the opening with its inactive surface facing the insulating base body; a dielectric layer formed in the opening of the insulating base body and on the first surface of the insulating base body, the insulating extending body and the active surface of the electronic element; and a circuit layer formed on the dielectric layer and electrically connected to the electronic element. The configuration of the insulating layer of the invention facilitates to enhance the overall structural rigidity of the package.Type: GrantFiled: October 22, 2015Date of Patent: April 18, 2017Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Ching-Wen Chiang, Cheng-Hao Ciou, Cheng-Chieh Wu, Kuang-Hsin Chen, Hsien-Wen Chen
-
Publication number: 20170040248Abstract: A met of fabricating an electronic package is provided, g: providing a carrier body haying a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing a portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since no temporary material is required. The present invention further provides the electronic package thus fabricated.Type: ApplicationFiled: August 4, 2015Publication date: February 9, 2017Inventors: Ching-Wen Chiang, Kuang-Hsin Chen, Sheng-Li Lu, Hsien-Wen Chen
-
Patent number: 9502335Abstract: A package structure is provided, which includes: a chip carrier having a plurality of conductive connection portions; at least an electronic element disposed on the chip carrier; a plurality of conductive wires erectly positioned on the conductive connection portions, respectively; an encapsulant formed on the chip carrier for encapsulating the conductive wires and the electronic element, wherein one ends of the conductive wires are exposed from the encapsulant; and a circuit layer formed on the encapsulant and electrically connected to exposed ends of the conductive wires. According to the present invention, the conductive wires serve as an interconnection structure. Since the wire diameter of the conductive wires is small and the pitch between the conductive wires can be minimized, the present invention reduces the size of the chip carrier and meets the miniaturization requirement.Type: GrantFiled: September 16, 2014Date of Patent: November 22, 2016Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chieh-Lung Lai, Hsien-Wen Chen, Hong-Da Chang, Mao-Hua Yeh
-
Publication number: 20160329267Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second sides; at least an electronic element disposed on the first side of the circuit structure; an encapsulant formed on the first side of the circuit structure for encapsulating the electronic element; a dielectric layer formed on portions of the second side of the circuit structure; and a metal structure formed on the dielectric layer and the circuit structure. The metal structure has a first metal layer bonded to the circuit structure and a second metal layer formed on the first metal layer and the dielectric layer. Therefore, by replacing a conventional silicon interposer with the circuit structure, the invention eliminates the need to fabricate through silicon vias so as to greatly reduce the fabrication difficulty and cost. The invention further provides a method for fabricating the electronic package.Type: ApplicationFiled: December 28, 2015Publication date: November 10, 2016Inventors: Hsiao-Chun Huang, Hsien-Wen Chen, Shih-Ching Chen, Guang-Hwa Ma
-
Publication number: 20160307833Abstract: An electronic packaging structure is provided, including a circuit portion, an electronic element disposed on an upper side of the circuit portion and a glass carrier disposed on a lower side of the circuit portion. By replacing a conventional silicon wafer with the glass carrier, the present invention eliminates the need of an adhesive layer and allows quick removal of the glass carrier during a subsequent process, thus saving the fabrication time and increasing the product yield. The present invention further provides a method for fabricating an electronic package.Type: ApplicationFiled: December 28, 2015Publication date: October 20, 2016Inventors: Hsien-Wen Chen, Shih-Ching Chen, Hsiao-Chun Huang, Guang-Hwa Ma
-
Publication number: 20160276256Abstract: A substrate structure is provided, which includes: a substrate body having opposite first and second surfaces; a plurality of conductive posts formed on the first surface of the substrate body and electrically connected to the substrate body; and a dielectric layer formed on the first surface of the substrate body for encapsulating the conductive posts, wherein one end surfaces of the conductive posts are exposed from the dielectric layer. Therefore, the present invention replaces the conventional silicon substrate with the dielectric layer so as to eliminate the need to fabricate the conventional TSVs (Through Silicon Vias) and thereby greatly reduce the fabrication cost. The present invention further provides an electronic package having the substrate structure and a fabrication method thereof.Type: ApplicationFiled: December 30, 2015Publication date: September 22, 2016Inventors: Ching-Wen Chiang, Kuang-Hsin Chen, Hsien-Wen Chen
-
Publication number: 20160163632Abstract: A package structure includes a dielectric layer having opposing first and second surfaces, a wiring layer formed on the first surface and having a plurality of conducive vias that penetrate the dielectric layer, an electronic component disposed on the first surface of the dielectric layer and electrically connected to the wiring layer, an encapsulant encapsulating the electronic component, and a packaging substrate disposed on the second surface and electrically connected to the conductive vias. With the dielectric layer in replacement of a conventional silicon board and the wiring layer as a signal transmission medium between the electronic component and the packaging substrate, the package structure does not need through-silicon vias. Therefore, the package structure has a simple fabrication process and a low fabrication cost. The present invention further provides a method of fabricating the package structure.Type: ApplicationFiled: August 4, 2015Publication date: June 9, 2016Inventors: Hsien-Wen Chen, Shih-Ching Chen, Chieh-Lung Lai