Abstract: A compound applying to skin and a method making the same comprises certain proportions for following first components: Dimethicone Crosspolymer, Dimethicone/Vinyl Dimethicone Crosspolymer, Cyclotetrasiloxane, Dimethicone, Cetyl PEG/PPG-15/15 Butyl Ether Dimethicone, Squalane, and Titanium Dioxide. Second components, third components, and fourth components with specific proportions as claimed are timely added in the first components. Sequentially mixing, heating, and dissolving the afore components would bring about the compound that keeps skin from sun exposure and provides functions of moisturizing, anti-wrinkle, spots clearing, blushers, anti-acnes, and whitening.

Abstract: A compound applying to skin and a method making the same comprises certain proportions for following first components: Dimethicone Crosspolymer, Dimethicone/Vinyl Dimethicone Crosspolymer, Cyclotetrasiloxane, Dimethicone, Cetyl PEG/PPG-15/15 Butyl Ether Dimethicone, Squalane, and Titanium Dioxide. Second components, third components, and fourth components with specific proportions as claimed are timely added in the first components. Sequentially mixing, heating, and dissolving the afore components would bring about the compound that keeps skin from sun exposure and provides functions of moisturizing, anti-wrinkle, spots clearing, blushers, anti-acnes, and whitening.

Abstract: The present invention discloses a composition of a nail polish remover to overcome the drawbacks of conventional nail polish removers that contain acetone, have irritating smells, and cause corrosive damages. The composition of the present invention includes gamma-butyrolactone with a weight percentage of 10% to 95%, water with a weight percentage of 2.3899% to 52.9% and an additive with a weight percentage of 2.6101% to 37.1%. The main composition used for removing nail polish is ?-butyrolactone which has no irritating smell and less damage to nails.

Abstract: A single-poly two-transistor PMOS memory cell for multiple-time programming applications includes a PMOS floating gate transistor sharing a drain/source P+ diffusion region with a PMOS select gate transistor all formed within a first n-well. A control plate for the floating gate transistor is formed in a second n-well. A single-poly two-transitor PMOS memory cell for one-time programming applications includes a PMOS floating gate transistor having a source formed as a p+ diffusion region in a single n-well. The source is adapted to also serve as control plate for the floating gate transistor.