Abstract: A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures. The semiconductor fin is over the substrate. The silicon layer is over the semiconductor fin. The gate structure is over the silicon layer, in which the gate structure includes an interfacial layer over the silicon layer, a gate dielectric layer over the interfacial layer, and a gate electrode over the gate dielectric layer. The gate spacers are on opposite sidewalls of the gate structure and in contact with the interfacial layer of the gate structure, in which a bottom surface of the interfacial layer is higher than bottom surfaces of the gate spacers. The source/drain structures are on opposite sides of the gate structure.

Abstract: A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures. The semiconductor fin is over the substrate. The silicon layer is over the semiconductor fin. The gate structure is over the silicon layer, in which the gate structure includes an interfacial layer over the silicon layer, a gate dielectric layer over the interfacial layer, and a gate electrode over the gate dielectric layer. The gate spacers are on opposite sidewalls of the gate structure and in contact with the interfacial layer of the gate structure, in which a bottom surface of the interfacial layer is higher than bottom surfaces of the gate spacers. The source/drain structures are on opposite sides of the gate structure.

Abstract: A method for forming a material having a Perovskite single crystal structure includes alternately growing, on a substrate, each of a plurality of first layers and each of a plurality of second layers having compositions different from the plurality of first layers and forming a material having a Perovskite single crystal structure by annealing the plurality of first layers and the plurality of second layers.

Abstract: A method includes forming a semiconductive channel layer on a substrate. A dummy gate is formed on the semiconductive channel layer. Gate spacers are formed on opposite sides of the dummy gate. The dummy gate is removed to form a gate trench between the gate spacers, resulting in the semiconductive channel layer exposed in the gate trench. A semiconductive protection layer is deposited in the gate trench and on the exposed semiconductive channel layer. A top portion of the semiconductive protection layer is oxidized to form an oxidation layer over a remaining portion of the semiconductive protection layer. The oxidation layer is annealed after the top portion of the semiconductive protection layer is oxidized. A gate structure is formed over the semiconductive protection layer and in the gate trench after the oxidation layer is annealed.

Abstract: A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures. The semiconductor fin is over the substrate. The silicon layer is over the semiconductor fin. The gate structure is over the silicon layer, in which the gate structure includes an interfacial layer over the silicon layer, a gate dielectric layer over the interfacial layer, and a gate electrode over the gate dielectric layer. The gate spacers are on opposite sidewalls of the gate structure and in contact with the interfacial layer of the gate structure, in which a bottom surface of the interfacial layer is higher than bottom surfaces of the gate spacers. The source/drain structures are on opposite sides of the gate structure.

Abstract: A semiconductor device includes a semiconductive channel region, a semiconductive protection layer, a gate structure, and a pair of gate spacers. The semiconductive protection layer is on and in contact with the channel. The gate structure is above the semiconductive protection layer and includes gate dielectric layer and a gate electrode. The gate dielectric layer is above the semiconductive protection layer. The gate electrode is above the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The semiconductive protection layer extends from an inner sidewall of a first one of the pair of gate spacers to an inner sidewall of a second one of the pair of gate spacers.

Abstract: A semiconductor device includes a semiconductive channel region, a semiconductive protection layer, a gate structure, and a pair of gate spacers. The semiconductive protection layer is on and in contact with the channel. The gate structure is above the semiconductive protection layer and includes gate dielectric layer and a gate electrode. The gate dielectric layer is above the semiconductive protection layer. The gate electrode is above the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The semiconductive protection layer extends from an inner sidewall of a first one of the pair of gate spacers to an inner sidewall of a second one of the pair of gate spacers.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, and source/drain regions. The gate structure comprises an yttrium oxide layer over the semiconductor substrate, an aluminum oxide layer over the yttrium oxide layer, and a gate electrode on the aluminum oxide layer. The source/drain regions are on the semiconductor substrate and on opposite sides of the gate structure.

Abstract: A method for forming a material having a Perovskite single crystal structure includes alternately growing, on a substrate, each of a plurality of first layers and each of a plurality of second layers having compositions different from the plurality of first layers and forming a material having a Perovskite single crystal structure by annealing the plurality of first layers and the plurality of second layers.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, and source/drain regions. The gate structure comprises an yttrium oxide layer over the semiconductor substrate, an aluminum oxide layer over the yttrium oxide layer, and a gate electrode on the aluminum oxide layer. The source/drain regions are on the semiconductor substrate and on opposite sides of the gate structure.

Abstract: A method for forming a material having a Perovskite single crystal structure includes alternately growing, on a substrate, each of a plurality of first layers and each of a plurality of second layers having compositions different from the plurality of first layers and forming a material having a Perovskite single crystal structure by annealing the plurality of first layers and the plurality of second layers.

Abstract: A method for manufacturing a semiconductor device includes forming a first high-k dielectric layer on a semiconductor substrate; forming a second high-k dielectric layer on the first high-k dielectric layer, in which the second high-k dielectric layer includes a material different from a material of the first high-k dielectric layer; annealing the first and second high-k dielectric layers, such that the first and second high-k dielectric layers are inter-diffused; and forming a gate electrode over the second high-k dielectric layer.

Abstract: A method for manufacturing a semiconductor device includes forming a first high-k dielectric layer on a semiconductor substrate; forming a second high-k dielectric layer on the first high-k dielectric layer, in which the second high-k dielectric layer includes a material different from a material of the first high-k dielectric layer; annealing the first and second high-k dielectric layers, such that the first and second high-k dielectric layers are inter-diffused; and forming a gate electrode over the second high-k dielectric layer.

Abstract: A method for forming a material having a Perovskite single crystal structure includes alternately growing, on a substrate, each of a plurality of first layers and each of a plurality of second layers having compositions different from the plurality of first layers and forming a material having a Perovskite single crystal structure by annealing the plurality of first layers and the plurality of second layers.