Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.

Abstract: An independent graphics card system comprises an expansion motherboard, a system power supply, at least one expansion graphics card and a fan assembly. The system power supply is electrically connected to the expansion motherboard. The at least one expansion graphics card is plugged into the expansion motherboard through an adapter card. The at least one expansion graphics card is parallel with the expansion motherboard. The fan assembly dissipates heat of the at least one expansion graphics card.

Abstract: A method for performing contactless ODEP for separation of CTCs is provided with the steps of obtaining patients' blood with rare cell suspected CTCs; adding at least one fluorescent antibody binding to CTCs into the blood; staining the blood; injecting the stained blood with fluorescent dye into an ODEP device and then performing fluorescent image identification; trapping the CTCs with at least one fluorescent antibody in the ODEP device by creating an image pattern and then generating an ODEP force; Separating the trapped CTCs from other non-CTCs cells; absorbing the trapped CTCs; and obtaining a high purity of CTCs. An apparatus for performing contactless ODEP for separation of CTCs is also provided.

Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.

Abstract: A method and a kit for detecting Mycobacterium tuberculosis are provided. The method includes a step of performing a nested qPCR assay to a specimen. The nested qPCR assay includes a first round of amplification using external primers and a second round of amplification using internal primers and a probe. The external primers have sequences of SEQ ID NOs. 1 and 2, and the internal primers and the probe have sequences of SEQ ID NOs. 3 to 5.

Abstract: A switching control circuit for use in controlling a resonant flyback power converter generates a first driving signal and a second driving signal. The first driving signal is configured to turn on the first transistor to generate a first current to magnetize a transformer and charge a resonant capacitor. The transformer and charge a resonant capacitor are connected in series. The second driving signal is configured to turn on the second transistor to generate a second current to discharge the resonant capacitor. During a power-on period of the resonant flyback power converter, the second driving signal includes a plurality of short-pulses configured to turn on the second transistor for discharging the resonant capacitor. A pulse-width of the short-pulses of the second driving signal is short to an extent that the second current does not exceed a current limit threshold.

Abstract: A device unlocking method and an electronic device are provided. The method includes: detecting fingerprint information of a user by a first sensor of the electronic device; authenticating the fingerprint information and temporarily storing an authentication result of the fingerprint information; after authenticating the fingerprint information, detecting operation environment information related to the electronic device by a second sensor of the electronic device; and in response to the operation environment information meeting a default condition, unlocking the electronic device according to the authentication result.

Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are presented. In embodiments the methods of manufacturing include depositing a first bonding layer on a first substrate, wherein the first substrate comprises a semiconductor substrate and a metallization layer. The first bonding layer and the semiconductor substrate are patterned to form first openings. A second substrate is bonded to the first substrate. After the bonding the second substrate, the second substrate is patterned to form second openings, at least one of the second openings exposing at least one of the first openings. After the patterning the second substrate, a third substrate is bonded to the second substrate, and after the bonding the third substrate, the third substrate is patterned to form third openings, at least one of the third openings exposing at least one of the second openings.

Abstract: A semiconductor chip and a manufacturing method thereof are provided. The semiconductor chip includes: an array of pillar structures, disposed on a front surface of the semiconductor chip, and respectively including a ground pillar and multiple working pillars laterally spaced apart from and substantially parallel with a line portion of the ground pillar; and dummy pillar structures, disposed on the front surface of the semiconductor chip and laterally surrounding the pillar structures. Active devices formed inside the semiconductor chip are electrically connected to the working pillar. The ground pillars of the pillar structures and the dummy pillar structures are electrically connected to form a current pathway on the front surface of the semiconductor chip.

Abstract: A resonant flyback power converter includes: a first and a second transistors which form a half-bridge circuit for switching a transformer and a resonant capacitor to generate an output voltage; a current-sense device for sensing a switching current of the half-bridge circuit to generate a current-sense signal; and a switching control circuit generating a first and a second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal controls the half-bridge circuit to generate a positive current to magnetize the transformer and charge the resonant capacitor. The turn-on of the second driving signal controls the half-bridge circuit to generate a negative current to discharge the resonant capacitor. The switching control circuit turns off the first transistor when the positive current exceeds a positive-over-current threshold, and/or, turns off the second transistor when the negative current exceeds a negative-over-current threshold.

Abstract: An electronic device includes a substrate, an upper conductive layer, and a lower conductive layer. The substrate has a plurality of inner vias and has an upper surface and a lower surface. The upper conductive layer includes an upper ground trace and an upper signal pad disposed on the upper surface. The upper ground trace is electrically connected to the ground vias and has an upper hollow portion exposing a part of the upper surface. The upper signal pad is disposed on the part of the upper surface exposed by the upper hollow portion and electrically connected to the signal via. The lower conductive layer includes a lower ground trace and a lower signal pad disposed on the lower surface. The lower conductive trace is electrically connected to the ground vias and has a lower hollow portion exposing a part of the lower surface. The lower signal pad is disposed on the part of the lower surface exposed by the lower hollow portion and electrically connected to the signal via.

Abstract: First fire operations for an ovonic threshold switch (OTS) selector is provided. A first fire operation includes setting a peak amplitude of a voltage pulse, and performing at least one cycle, including: providing the voltage pulse to the OTS selector; sensing an output current passing through the OTS selector in response to the received voltage pulse; comparing a peak amplitude of the voltage pulse with a maximum peak amplitude ensuring initialization of the OTS selector; ending the first fire operation if the peak amplitude reaches the maximum peak amplitude; comparing the output current with a target current indicative of initialization of the OTS selector if the peak amplitude is lower than the maximum peak amplitude; ending the first fire operation if the output current reaches the target current; and setting another voltage pulse with a greater peak amplitude if the output current is lower than the target current.

Abstract: A semiconductor package includes a semiconductor die, a redistribution structure and connective terminals. The redistribution structure is disposed on the semiconductor die and includes a first metallization tier disposed in between a pair of dielectric layers. The first metallization tier includes routing conductive traces electrically connected to the semiconductor die and a shielding plate electrically insulated from the semiconductor die. The connective terminals include dummy connective terminals and active connective terminals. The dummy connective terminals are disposed on the redistribution structure and are electrically connected to the shielding plate. The active connective terminals are disposed on the redistribution structure and are electrically connected to the routing conductive traces. Vertical projections of the dummy connective terminals fall on the shielding plate.

Abstract: An aerial vehicle including a body, a first ranging device, a second ranging device and a controller is provided. The first ranging device is disposed on the body and is configured to detect a first distance between the first ranging device and the reflector. The second ranging device is disposed on the body and is configured to detect a second distance between the second ranging device and the reflector. The controller is configured to obtain an included angle between a direction of the body and the reflector according to the first distance and the second distance.

Abstract: An image quality improvement method and an image processing apparatus using the same are provided. Denoising filtering is performed to an original image by a filter to obtain a preliminary processing image. The preliminary processing image is input to a multi-stage convolutional network model to generate an optimization image through the multi-stage convolutional network model. The multi-stage convolutional network model includes multiple convolutional network sub-models, and these convolutional network sub-models respectively correspond to different network architectures.

Abstract: Provided are sustained-release pharmaceutical compositions including a ketamine pamoate salt and a pharmaceutically acceptable carrier thereof. The compositions include aqueous suspension, solution and matrix delivery system, which can provide sustained release for anesthesia, analgesia or treatment of central nervous system and anti-inflammatory diseases.

Abstract: A semiconductor device includes a fin extending from a substrate. The fin has a source/drain region and a channel region. The channel region includes a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer and vertically separated from the first semiconductor layer by a spacing area. A high-k dielectric layer at least partially wraps around the first semiconductor layer and the second semiconductor layer. A metal layer is formed along opposing sidewalls of the high-k dielectric layer. The metal layer includes a first material. The spacing area is free of the first material.

Abstract: A manufacturing method of a chip package includes patterning a wafer to form a scribe trench, in which a light-transmissive function layer below the wafer is in the scribe trench, the light-transmissive function layer is between the wafer and a carrier, and a first included angle is formed between an outer wall surface and a surface of the wafer facing the light-transmissive function layer; cutting the light-transmissive function layer and the carrier along the scribe trench to form a chip package that includes a chip, the light-transmissive function layer, and the carrier; and patterning the chip to form an opening, in which the light-transmissive function layer is in the opening, a second included angle is formed between an inner wall surface of the chip and a surface of the chip facing the light-transmissive function layer, and is different from the first included angle.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.

Abstract: A memory device includes a substrate, a transistor disposed over the substrate, an interconnect structure disposed over and electrically connected to the transistor, and a memory stack disposed between two adjacent metallization layers of the interconnect structure. The memory stack includes a bottom electrode disposed over the substrate and electrically connected to a bit line, a memory layer disposed over the bottom electrode, a selector layer disposed over the memory layer, and a top electrode disposed over the selector layer and electrically connected to a word line. Besides, at least one moisture-resistant layer is provided adjacent to and in physical contact with the selector layer, and the at least one moisture-resistant layer includes an amorphous material.