Patents by Inventor Hsin-An Chen

Hsin-An Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11937947
    Abstract: The present invention provides a circuitry of a biopotential acquisition system, where the circuitry includes an input node, an ETI transmitter, a capacitor and an ETI receiver. The input node is configured to receive an input signal from an electrode of the biopotential acquisition system. The ETI transmitter is configured to generate a transmitter signal. A first node of the capacitor is coupled to the ETI transmitter, and a second node of the capacitor is coupled to the input node. The ETI receiver is coupled to the input node, and is configured to receive the transmitter signal via the capacitor to generate an ETI.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: March 26, 2024
    Assignee: MEDIATEK INC.
    Inventor: Chih-Hsin Chen
  • Patent number: 11943595
    Abstract: A cell includes a membrane and an actuating layer. The membrane includes a first membrane subpart and a second membrane subpart, wherein the first membrane subpart and the second membrane subpart are opposite to each other. The actuating layer is disposed on the first membrane subpart and the second membrane subpart. The first membrane subpart includes a first anchored edge which is fully or partially anchored, and edges of the first membrane subpart other than the first anchored edge are non-anchored. The second membrane subpart includes a second anchored edge which is fully or partially anchored, and edges of the second membrane subpart other than the second anchored edge are non-anchored.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: March 26, 2024
    Assignee: xMEMS Labs, Inc.
    Inventors: Chiung C. Lo, Hao-Hsin Chang, Wen-Chien Chen, Chun-I Chang
  • Patent number: 11942699
    Abstract: An antenna device includes a first insulation layer, a defected metal layer, a second insulation layer, and a plurality of radiators. The defected metal layer is disposed on the first insulation layer, and the defected metal layer has a plurality of recess features which are arranged with uniform pitches. The second insulation layer is disposed on the first insulation layer and the defected metal layer. The radiators are disposed on the second insulation layer, and each radiator has a feeding portion and a grounding portion.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: March 26, 2024
    Assignees: Inventec (Pudong) Technology Corporation, INVENTEC CORPORATION
    Inventors: Hsin-Hung Lin, Wei Chen Cheng
  • Publication number: 20240096498
    Abstract: A method for evaluating a risk of a subject getting a specific disease includes steps of: storing a reference database that contains original parameter sets; selecting target alleles from an SNP profile derived from genome sequencing data of a subject; selecting target parameter sets from among the original parameter sets; calculating, for each of the target parameter sets, a race factor based on a global risk allele frequency and a group-specific risk allele frequency included in the target parameter set; calculating a genetic factor based on statistics, global reference allele frequencies, the race factors for the target parameter sets, and numbers of chromosomes in homologous chromosome pairs included in the target parameter sets; calculating a citation factor based on numbers of citation times included in the target parameter sets; and calculating a risk score based on the genetic factor and the citation factor.
    Type: Application
    Filed: August 28, 2023
    Publication date: March 21, 2024
    Inventors: Yi-Ting CHEN, Sing-Han HUANG, Ching-Yung LIN, Xiang-Yu LIN, Cheng-Tang WANG, Raksha NANDANAHOSUR RAMESH, Pei-Hsin CHEN
  • Publication number: 20240096256
    Abstract: An example device includes a display component that is configured to operate at a first refresh rate or a second refresh rate. The device also includes one or more processors operable to perform operations. The operations include identifying a rate change triggering event while the display component is operating at the first refresh rate. The operations further include determining a current brightness value of the display component. The operations also include determining, based on an environmental state measurement associated with an environment around the device, a threshold brightness value. The operations additionally include transitioning the display component from the first refresh rate to the second refresh rate m response to identifying the rate change triggering event if the current brightness value of the display component meets or exceeds the threshold brightness value.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Chien-Hui Wen, Yichi Chen, Hsin-Yu Chen
  • Publication number: 20240098106
    Abstract: Technologies for generating a set of models for each account, where each model is a fine-grained, unsupervised behavior model trained for each user to monitor and detect anomalous patterns are described. An unsupervised training pipeline can generate user models, each being associated with one of multiple accounts and is trained to detect an anomalous pattern using feature data associated with the one account. Each account is associated with at least one of a user, a machine, or a service. An inference pipeline can detect a first anomalous pattern in first data associated with a first account using a first user model. The inference pipeline can detect a second anomalous pattern in second data associated with a second account using a second user model.
    Type: Application
    Filed: August 17, 2023
    Publication date: March 21, 2024
    Inventors: Rachel Allen, Gorkem Batmaz, Michael Demoret, Ryan Kraus, Hsin Chen, Bartley Richardson
  • Publication number: 20240096865
    Abstract: A semiconductor device, includes a first metal layer, a second metal layer, a drain/source contact and at least one conductive via. The first metal layer has a first conductor that extends in a first direction and a second conductor that extends in the first direction, wherein the second conductor is directly adjacent to the first conductor. The second metal layer has a third conductor that extends in a second direction, wherein the second direction is transverse to the first direction. The drain/source contact extends in the second direction and is connected to the second conductor. The at least one conductive via connects the first conductor and the second conductor through the third conductor.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: Wei-Hsin TSAI, Hui-Zhong ZHUANG, Chih-Liang CHEN, Li-Chun TIEN
  • Publication number: 20240097351
    Abstract: The present disclosure provides an antenna system, which includes a defected ground structure board and an antenna structure board. The defected ground structure board includes a first insulating plate and a defected ground structure layer, and the defected ground structure layer is disposed on the first insulating plate. The antenna structure board is disposed on the defected ground structure board. The antenna structure board includes at least one antenna body and a second insulating plate, the at least one antenna body is disposed on the second insulating plate, and the second insulating plate is disposed on the defected ground structure layer.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 21, 2024
    Inventors: Hsin Hung LIN, Yu Shu TAI, Wei Chen CHENG
  • Patent number: 11931187
    Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 19, 2024
    Assignees: Chang Gung Medical Foundation Chang Gung Memorial Hospital at Keelung, Chang Gung Memorial Hospital, Linkou, Chang Gung University
    Inventors: Jiun-Jie Wang, Yi-Hsin Weng, Shu-Hang Ng, Jur-Shan Cheng, Yi-Ming Wu, Yao-Liang Chen, Wey-Yil Lin, Chin-Song Lu, Wen-Chuin Hsu, Chia-Ling Chen, Yi-Chun Chen, Sung-Han Lin, Chih-Chien Tsai
  • Patent number: 11934965
    Abstract: A processing unit to support inference acceleration for machine learning (ML) comprises an inline post processing unit configured to accept and maintain one or more lookup tables for performing a tanh and/or sigmoid operation/function. The inline post processing unit is further configured to accept data from a set of registers configured to maintain output from a processing block instead of streaming the data from an on-chip memory (OCM), perform the tanh and/or sigmoid operation on each element of the data from the processing block on a per-element basis via the one or more lookup tables, and stream post processing result of the per-element tanh and/or sigmoid operation back to the OCM after the tanh and/or sigmoid operation is complete.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: March 19, 2024
    Assignee: Marvell Asia Pte Ltd
    Inventors: Avinash Sodani, Ulf Hanebutte, Chia-Hsin Chen
  • Patent number: 11931776
    Abstract: Provided are an actuator, method for manufacturing the actuator, and acoustic transmitter having the actuator. The actuator includes: an elastic metal member having a plurality of curved segments and a plurality of connection segments which constitute a ring structure with a long-axis direction and a short-axis direction; a multilayer piezoelectric member disposed within the ring structure and having a plurality of stacked piezoelectric units along the long-axis direction; and a plurality of coupling members disposed within the ring structure, wherein the multilayer piezoelectric member has two ends in the long-axis direction that are coupled to the connection segments of the elastic metal member in the long-axis direction. A preload stress is imparted to the elastic metal member. A plurality of coupling members having a size corresponding to the preload stress are disposed between the elastic metal member and the multilayer piezoelectric member.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: March 19, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Hsin Lin, Ching-Iuan Sheu, Yu-Tsung Chiu, Chun-Ti Chen
  • Publication number: 20240086612
    Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Po-Hsiang HUANG, Fong-Yuan CHANG, Clement Hsingjen WANN, Chih-Hsin KO, Sheng-Hsiung CHEN, Li-Chun TIEN, Chia-Ming HSU
  • Publication number: 20240088093
    Abstract: In an embodiment, a method includes: attaching a package component to a package substrate, the package component includes: a first die being disposed over an interposer; a second die being disposed over the interposer and laterally adjacent to the first die; and an encapsulant being disposed around the first die and the second die; attaching a thermal interface material to the first die and the second die; and attaching a lid structure to the package substrate, the lid structure includes: a lid cap being disposed over the thermal interface material; and a plurality of lid feet connecting the lid cap to the package substrate, in a plan view the plurality of lid feet forming a discontinuous loop around the package component.
    Type: Application
    Filed: January 4, 2023
    Publication date: March 14, 2024
    Inventors: Wensen Hung, Tsung-Yu Chen, Wen-Hsin Wei, Hsien-Pin Hu
  • Publication number: 20240084012
    Abstract: An isolated bispecific antibody or antigen-binding portion thereof includes a first chain which specifically binds to human PD-1(hPD-1) and blocks the interaction between hPD-1 and PD-L1, and a second chain which specifically binds to human CD47 and inhibits its interaction with SIRP-alpha, where the first chain and the second chain are coupled in a knob-in-hole format through their respective CH3 domain.
    Type: Application
    Filed: December 31, 2021
    Publication date: March 14, 2024
    Inventors: Chun-Jen LIN, Cheng-Chi CHAO, Chang-Hsin Chen, Gloria Guohong ZHANG, Guochen YAN
  • Publication number: 20240087915
    Abstract: A bonding tool includes a gas supply line that may extend directly between valves associated with one or more gas supply tanks and a processing chamber such that gas supply line is uninterrupted without any intervening valves or other types of structures that might otherwise cause a pressure buildup in the gas supply line between the processing chamber and the valves associated with the one or more gas supply tanks. The pressure in the gas supply line may be maintained at or near the pressure in the processing chamber so that gas provided to the processing chamber through the gas supply line does not cause a pressure imbalance in the processing chamber, which might otherwise cause early or premature contact between semiconductor substrates that are to be bonded in the processing chamber.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Yen-Hao HUANG, Chun-Yi CHEN, I-Shi WANG, Yin-Tun CHOU, Yuan-Hsin CHI, Sheng-Yuan LIN
  • Patent number: 11929767
    Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: March 12, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chieh-Hsun Hsiao, Ming-Chou Wu, Wen-Chang Lee, Narayanan Baskaran, Wei-Hsin Tseng, Jenwei Ko, Po-Sen Tseng, Hsin-Hung Chen, Chih-Yuan Lin, Caiyi Wang
  • Patent number: 11929116
    Abstract: A memory device and a method for operating the memory device are provided. The memory device includes a memory cell and a bit line connected to the memory cell. A negative voltage generator is connected to the bit line. The negative voltage generator, when enabled, is operative to provide a first write path for the bit line. A control circuit is connected to the negative voltage generator and the bit line. The control circuit is operative to provide a second write path for the bit line when the negative voltage generator is not enabled.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Hsin Nien, Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen
  • Patent number: 11929434
    Abstract: A switch device includes a P-type substrate, a first gate structure, a first N-well, a shallow trench isolation structure, a first P-well, a second gate structure, a first N-type doped region, a second P-well, and a second N-type doped region. The first N-well is formed in the P-type substrate and partly under the first gate structure. The shallow trench isolation structure is formed in the first N-well and under the first gate structure. The first P-well is formed in the P-type substrate and under the first gate structure. The first N-type doped region is formed in the P-type substrate and between the first gate structure and the second gate structure. The second P-well is formed in the P-type substrate and under the second gate structure. The second N-type doped region is formed in the second P-well and partly under the second gate structure.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: March 12, 2024
    Assignee: eMemory Technology Inc.
    Inventors: Chih-Hsin Chen, Shih-Chen Wang, Tsung-Mu Lai, Wen-Hao Ching, Chun-Yuan Lo, Wei-Chen Chang
  • Patent number: D1017381
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: March 12, 2024
    Assignee: QBIC TECHNOLOGY CO., LTD.
    Inventors: Yi-Hsin Chen, Wei-Yuan Cheng, Ren-Yin Wu Ji
  • Patent number: D1019349
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: March 26, 2024
    Assignee: QBIC TECHNOLOGY CO., LTD.
    Inventors: Yi-Hsin Chen, Wei-Yuan Cheng, Ren-Yin Wu Ji