Abstract: In some embodiments, the present disclosure relates an integrated chip including a substrate. A conductive interconnect feature is arranged over the substrate. The conductive interconnect feature has a base feature portion with a base feature width and an upper feature portion with an upper feature width. The upper feature width is narrower than the base feature width such that the conductive interconnect feature has tapered outer feature sidewalls. An interconnect via is arranged over the conductive interconnect feature. The interconnect via has a base via portion with a base via width and an upper via portion with an upper via width. The upper via width is wider than the base via width such that the interconnect via has tapered outer via sidewalls.

Abstract: A display device includes at least one display module and a backlight module. The display module includes display units and N driving chips. The N driving chips are arranged along a first direction and electrically connected to the display units. The display units are connected and arranged in N rows in the first direction and M columns in a second direction. N and M are respectively greater than or equal to 1. The backlight module includes a light bar assembly adapted to be disposed below a column of the M columns of the display units farthest from the driving chips, and a length of the light bar assembly corresponds to that of the display units along the first direction. The light bar assembly includes at least one first light bar unit. A length of each first light bar unit is X times the length of each display unit along the first direction, and X is greater than or equal to 1.