Abstract: An image sensor includes at least one photosensitive element disposed in a semiconductor substrate. Metal conductors may be disposed on the semiconductor substrate. A filter may be disposed between at least two individual metal conductors and a micro-lens may be disposed on the filter. There may be insulator material disposed between the metal conductors and the semiconductor substrate and/or between individual metal conductors. The insulator material may be removed so that the filter may be disposed on the semiconductor substrate.

Abstract: A technique for fabricating an array of imaging pixels includes fabricating front side components on a front side of the array. After fabricating the front side components, a dopant layer is implanted on a backside of the array. A mask is formed over the dopant layer to selectively expose portions of the dopant layer. Next, the exposed portions of the dopant layer are laser annealed. Alternatively, the mask may be disposed over the backside prior to the formation of the dopant layer and the dopants implanted through the exposed portions and subsequently laser annealed.

Abstract: A backside illuminated imaging sensor includes a semiconductor substrate, a metal interconnect layer and a light attenuating layer. The semiconductor substrate has a front surface, a back surface, and includes at least one imaging pixel formed on the front surface of the semiconductor substrate. The metal interconnect layer is electrically coupled to the imaging pixel and the light attenuating layer is coupled between the metal interconnect layer and the front surface of the semiconductor substrate. In operation, the imaging pixel receives light from the back surface of the semiconductor substrate, where a portion of the received light propagates through the imaging pixel to the light attenuating layer. The light attenuating layer is configured to substantially attenuate the portion of light received from the imaging pixel.

Abstract: A backside illuminated imaging sensor includes a semiconductor substrate having a front surface and a back surface. The semiconductor substrate has at least one imaging array formed on the front surface. The imaging sensor also includes a carrier substrate to provide structural support to the semiconductor substrate, where the carrier substrate has a first surface coupled to the front surface of the semiconductor substrate. A redistribution layer is formed between the front surface of the semiconductor substrate and the second surface of the carrier substrate to route electrical signals between the imaging array and a second surface of the carrier substrate.

Abstract: The invention involves the integration of curved micro-mirrors over a photodiode active area (collection area) in a CMOS image sensor (CIS) process. The curved micro-mirrors reflect light that has passed through the collection area back into the photo diode. The curved micro-mirrors are best implemented in a backside illuminated device (BSI).

Abstract: An image sensor that has a pixel array using an isolation structure between pixels that reduce electrical cross-talk is disclosed. The pixel array is formed on a substrate that has a thin (less than 5 microns) epitaxial layer. The isolation structure uses a deep p-well to surround a shallow trench isolation. The deep p-well is formed using an implant energy of typically over 700 keV.

Abstract: A system and method for semiconductor fabrication fault analysis. The storage device stores test records. The program module receives a study lot identity, acquires suspect fabrication issues corresponding to the study lot identity, acquires a number of comparative wafer lot identities processed by the same fabrication tool and fabrication recipe for each fabrication issue, defines the comparative wafer lot identities having the same failed cluster groups as similar failed lot identities, calculates a similarity score for each similar failed lot identity, calculates a causal score according to the similarity scores for each suspect fabrication issue, and arranges the suspect fabrication issues according to causal scores thereof.

Abstract: A system and method for semiconductor fabrication fault analysis. The storage device stores test records. The program module receives a study lot identity, acquires suspect fabrication issues corresponding to the study lot identity, acquires a number of comparative wafer lot identities processed by the same fabrication tool and fabrication recipe for each fabrication issue, defines the comparative wafer lot identities having the same failed cluster groups as similar failed lot identities, calculates a similarity score for each similar failed lot identity, calculates a causal score according to the similarity scores for each suspect fabrication issue, and arranges the suspect fabrication issues according to causal scores thereof.