Abstract: A display device including a substrate, a cholesteric liquid crystal layer, and a transparent electrode layer that are sequentially stacked is provided. The cholesteric liquid crystal layer includes cholesteric liquid crystal molecules and a plurality of transparent photoresist structures. Each of the transparent photoresist structures is a closed structure, and the cholesteric liquid crystal molecules are respectively accommodated in a plurality of patterned areas respectively surrounded by the transparent photoresist structures, so as to form a plurality of cholesteric liquid crystal patterns. The transparent electrode layer includes a plurality of sub-electrodes. The cholesteric liquid crystal patterns are respectively driven by the sub-electrodes. An orthogonal projection of each of the transparent photoresist structures on the substrate falls in an orthogonal projection of a corresponding sub-electrode of the sub-electrodes on the substrate.

Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.

Abstract: An optical receiver device includes a boost converter circuit, an optical receiver circuit, and a pulse width modulation controller circuitry. The boost converter circuit is configured to convert a supply voltage according to a pulse width modulation signal, in order to generate an output voltage. The optical receiver circuit is configured to set a gain according to the output voltage, in order to convert an optical signal to a data signal according to the gain. The pulse width modulation controller circuitry is configured to perform a digital to analog conversion according to a control code to gradually adjust a current associated with the output voltage, and to compare the output voltage with a reference voltage to generate the pulse width modulation signal.

Abstract: An optical receiver device includes a boost converter circuit, an optical receiver circuit, and a pulse width modulation controller circuitry. The boost converter circuit is configured to convert a supply voltage according to a pulse width modulation signal, in order to generate an output voltage. The optical receiver circuit is configured to set a gain according to the output voltage, in order to convert an optical signal to a data signal according to the gain. The pulse width modulation controller circuitry is configured to perform a digital to analog conversion according to a control code to gradually adjust a current associated with the output voltage, and to compare the output voltage with a reference voltage to generate the pulse width modulation signal.

Abstract: A silicon island structure and a method of fabricating same are disclosed. The method includes: forming multiple first trenches in a silicon substrate; forming second trenches by partially filling some of the first trenches with an insulating material; depositing a protective layer over the silicon substrate and over the second trenches; removing the protective layer over bottoms of the second trenches and the insulating material under the second trenches, thereby exposing sidewalls of some first trenches; oxidizing portions of the silicon substrate between the exposed sidewalls of the first trenches to form an oxide layer; removing the protective layer covering sidewalls of the second trenches; and filling the second trenches with an isolating material to form isolations, wherein portions of the silicon substrate between the isolations define silicon islands. This method enables the formation of silicon islands at desired locations with reduced process complexity and cost.

Abstract: A process of manufacturing a ultra-soft yarn includes wrapping a roving material with a yarn by a low twist-multiplier of about 1˜4, wherein the roving material is drawn at a draw ratio preferably between 1 and 10, wherein the ultra-soft yarn has a fluffy structure, which can provide better softness, draping property, and hand feel to users. Fabric including the ultra-soft yarn is also provided.

Abstract: A process of manufacturing a ultra-soft yarn includes wrapping a roving material with a yarn by a low twist-multiplier of about 1˜4, wherein the roving material is drawn at a draw ratio preferably between 1 and 10, wherein the ultra-soft yarn has a fluffy structure, which can provide better softness, draping property, and hand feel to users. Fabric including the ultra-soft yarn is also provided.

Abstract: A multi-media KVM switch is for providing an output signal to drive a user-interface output device. The multi-media KVM switch comprises an embedded multi-media system, an arbiter and a multiplexer. The embedded multi-media system is enabled as receiving an enabling signal and providing a first device signal. The arbiter is for determining an operational state of at least a computer system in response to a second device signal outputted by the at least computer system. The arbiter provides the enabling signal to enable the embedded multi-media system when the at least a computer system is in a standby or an off state, and the arbiter is further for providing a selection signal. The multiplexer is for receiving the first and the second device signals, and outputting one of the first and the second device signals as the output signal to the user-interface output device.

Abstract: A method for actuating a system on chip (SOC) includes the following steps. First, determine whether the SOC is connected to a computer system via a communication connection. If no, determine whether a non-volatile memory of the SOC has an initial flag signal. If yes, read correction information stored in the non-volatile memory in response to the initial flag signal and set a corresponding first register of the SOC according to the correction information.

Abstract: A phase-difference detecting method is for detecting phase difference between a first signal and a second signal of the same frequency. First, generate a detection signal. Next, sample the detection signal respectively according to the first signal and the second signal to obtain a first sample value and a second sample value. Then, determine whether a determination condition that the first and the second sample values are respectively equal to the previous first and second sample values is satisfied. When the determination condition is unsatisfied for the first time, record a delay time of the detection signal as a first time. When the determination condition is unsatisfied for the second time, record a delay time of the detection signal as a second time. Obtain the phase difference between the first signal and the second signal according to the first time and the second time.

Abstract: A multi-media KVM switch is for providing an output signal to drive a user-interface output device. The multi-media KVM switch comprises an embedded multi-media system, an arbiter and a multiplexer. The embedded multi-media system is enabled as receiving an enabling signal and providing a first device signal. The arbiter is for determining an operational state of at least a computer system in response to a second device signal,outputted by the at least computer system. The arbiter provides the enabling signal to enable the embedded multi-media system when the at least a computer system is in a standby or an off state, and the arbiter is further for providing a selection signal. The multiplexer is for receiving the first and the second device signals, and outputting one of the first and the second device signals as the output signal to the user-interface output device.

Abstract: A method for actuating a system on chip (SOC) includes the following steps. First, determine whether the SOC is connected to a computer system via a communication connection. If no, determine whether a non-volatile memory of the SOC has an initial flag signal. If yes, read correction information stored in the non-volatile memory in response to the initial flag signal and set a corresponding first register of the SOC according to the correction information.

Abstract: A phase-difference detecting method is for detecting phase difference between a first signal and a second signal of the same frequency. First, generate a detection signal. Next, sample the detection signal respectively according to the first signal and the second signal to obtain a first sample value and a second sample value. Then, determine whether a determination condition that the first and the second sample values are respectively equal to the previous first and second sample values is satisfied. When the determination condition is unsatisfied for the first time, record a delay time of the detection signal as a first time. When the determination condition is unsatisfied for the second time, record a delay time of the detection signal as a second time. Obtain the phase difference between the first signal and the second signal according to the first time and the second time.

Abstract: A memory controller and method thereof are provided. The memory controller includes a control logic circuit, a phase locked loop (PLL) and a multiplexer. The PLL generates a plurality of phase clock signals according to a system clock signal. The phase clock signals have the same frequency with the system clock. The phase clock signals have different phase difference to each other. The multiplexer receives the phase clock signals under the control of the control logic circuit, then selects and outputs one of the phase clock signals to generate a selected phase clock signal.