Patents by Inventor Hsin-Han LEE

Hsin-Han LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240394440
    Abstract: Electronic system level (ESL) design and verification of the present disclosure is utilized to provide an electronic simulation and modeling of function safety and fault management of an electronic device. A method for simulating a safety circuit includes providing an electronic architectural design to perform one or more functional behaviors of the electronic device in accordance with an electronic design specification. The method further includes modeling the safety circuit of the electronic architectural design and one or more other electronic circuits of the electronic architectural design that communicate with the safety circuit. The method further includes simulating, using the modeling, operation of the safety circuit while the electronic architectural design is performing the one or more functional behaviors. The method also includes determining whether the simulated operation of the safety circuit satisfies the electronic design specification.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Yuan TING, Hsin-Cheng Chen, Sandeep Kumar Goel, Mei Wong, Yun-Han Lee
  • Publication number: 20240387688
    Abstract: An exemplary method for forming a gate stack of a multigate device includes forming a gate dielectric layer, forming a work function layer over the gate dielectric layer, forming a cap over the work function layer, and forming a gate electrode layer over the cap. Forming the cap includes forming a first portion of a first capping layer over the work function layer, performing an oxygen control treatment, forming a second portion of the first capping layer over the first portion of the first capping layer, and forming a second capping layer over the first capping layer. The oxygen control treatment exposes the first portion of the first capping layer to: oxygen by breaking vacuum, ozonated deionized water, oxygen radicals, an oxygen-containing annealing environment, or a combination thereof. The first capping layer can be a metal nitride layer, and the second capping layer can be a silicon layer.
    Type: Application
    Filed: May 16, 2023
    Publication date: November 21, 2024
    Inventors: Chih-Wei Lee, Hsin-Han Tsai
  • Publication number: 20240387644
    Abstract: Ruthenium of a metal gate (MG) and/or a middle end of line (MEOL) structure is annealed to reduce, or even eliminate, seams after the ruthenium is deposited. Because the annealing reduces (or removes) seams in deposited ruthenium, electrical performance is increased because resistivity of the MG and/or the MEOL structure is decreased. Additionally, for MGs, the annealing generates a more even deposition profile, which results in a timed etching process producing a uniform gate height. As a result, more of the MGs will be functional after etching, which increases yield during production of the electronic device.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 21, 2024
    Inventors: Hsin-Han TSAI, Hsiang-Ju LIAO, Yi-Lun LI, Cheng-Lung HUNG, Weng CHANG, Chi On CHUI, Jo-Chun HUNG, Chih-Wei LEE, Chia-Wei CHEN
  • Publication number: 20240363424
    Abstract: Semiconductor devices and methods of manufacturing semiconductor devices with differing threshold voltages are provided. In embodiments the threshold voltages of individual semiconductor devices are tuned through the removal and placement of differing materials within each of the individual gate stacks within a replacement gate process, whereby the removal and placement helps keep the overall process window for a fill material large enough to allow for a complete fill.
    Type: Application
    Filed: July 11, 2024
    Publication date: October 31, 2024
    Inventors: Chung-Chiang Wu, Hsin-Han Tsai, Wei-Chin Lee, Chia-Ching Lee, Hung-Chin Chung, Cheng-Lung Hung, Da-Yuan Lee
  • Patent number: 12124146
    Abstract: A display device including a substrate, a cholesteric liquid crystal layer, and a transparent electrode layer that are sequentially stacked is provided. The cholesteric liquid crystal layer includes cholesteric liquid crystal molecules and a plurality of transparent photoresist structures. Each of the transparent photoresist structures is a closed structure, and the cholesteric liquid crystal molecules are respectively accommodated in a plurality of patterned areas respectively surrounded by the transparent photoresist structures, so as to form a plurality of cholesteric liquid crystal patterns. The transparent electrode layer includes a plurality of sub-electrodes. The cholesteric liquid crystal patterns are respectively driven by the sub-electrodes. An orthogonal projection of each of the transparent photoresist structures on the substrate falls in an orthogonal projection of a corresponding sub-electrode of the sub-electrodes on the substrate.
    Type: Grant
    Filed: October 23, 2023
    Date of Patent: October 22, 2024
    Assignee: AUO Corporation
    Inventors: Chun-Han Lee, Chien-Chuan Chen, Ju-Wen Chang, Hsin Chiang Chiang, Peng-Yu Chen
  • Patent number: 12087637
    Abstract: Semiconductor devices and methods of manufacturing semiconductor devices with differing threshold voltages are provided. In embodiments the threshold voltages of individual semiconductor devices are tuned through the removal and placement of differing materials within each of the individual gate stacks within a replacement gate process, whereby the removal and placement helps keep the overall process window for a fill material large enough to allow for a complete fill.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: September 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Chiang Wu, Hsin-Han Tsai, Wei-Chin Lee, Chia-Ching Lee, Hung-Chin Chung, Cheng-Lung Hung, Da-Yuan Lee
  • Patent number: 12080593
    Abstract: Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a second contact feature over the first contact feature, a barrier layer between the second dielectric layer and the second contact feature, and a liner between the barrier layer and the second contact feature. An interface between the first contact feature and the second contact feature includes the liner but is free of the barrier layer.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Ping Chen, Ming-Han Lee, Shin-Yi Yang, Yung-Hsu Wu, Chia-Tien Wu, Shau-Lin Shue, Min Cao
  • Patent number: 12050192
    Abstract: A gas sensing device includes a substrate, a conductive unit, and a sensing layer. The conductive unit is disposed on the substrate, and includes two electrodes. The sensing layer is disposed on the conductive unit, and is electrically connected with the electrodes. The sensing layer adapted to absorb carbon dioxide includes polyethyleneimine and polyethylene glycol. A detecting system including a testing device, an analyzing device and the aforementioned gas sensing device is also disclosed. The gas sensing device is detachably mounted to and is electrically connected to the testing device. Electrical property of the gas sensing device 100 changes when the gas sensing device 100 absorbs carbon dioxide.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: July 30, 2024
    Assignees: NATIONAL TSING HUA UNIVERSITY, TAIPEI VETERANS GENERAL HOSPITAL
    Inventors: Nyan-Hwa Tai, Chi-Young Lee, Ching Chang, Cheng-Chieh Lin, Tien-Wang Peng, Yi-Han Hsiao, Kang-Cheng Su, Hsin-Kuo Ko
  • Patent number: 12040235
    Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: July 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Chung-Chiang Wu, Hung-Chin Chung, Hsien-Ming Lee, Da-Yuan Lee, Jian-Hao Chen, Chien-Hao Chen, Kuo-Feng Yu, Chia-Wei Chen, Chih-Yu Hsu
  • Patent number: 12033682
    Abstract: An in-plane magnetized spin-orbit magnetic device is provided. The in-plane magnetized spin-orbit magnetic device includes a heavy metal layer, an antiferromagnetic layer, and a magnetic tunnel junction. The antiferromagnetic layer is disposed on the heavy metal layer, and the magnetic tunnel junction is disposed on the antiferromagnetic layer. The magnetic tunnel junction includes a free layer, a barrier layer, and a pinned layer. The barrier layer is disposed on the free layer, and the pinned layer is disposed on the barrier layer. A film surface shape of the free layer is a rounded rectangle.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: July 9, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Jeng-Hua Wei, I-Jung Wang, Shan-Yi Yang, Yao-Jen Chang, Fang-Ming Chen
  • Publication number: 20240177756
    Abstract: A magnetic random access memory (MRAM) structure is provided. The MRAM structure includes a first write electrode, a first magnetic tunnel junction (MTJ) stack, a voltage control electrode, a second MTJ stack, and a second write electrode. The first MTJ stack includes a first free layer disposed on the first write electrode, a first tunnel barrier layer disposed on the first free layer, and a first fixed layer disposed on the first tunnel barrier layer. The voltage control electrode is disposed on the first MTJ stack. The second MTJ stack includes a second fixed layer disposed on the voltage control electrode, a second tunnel barrier layer disposed on the second fixed layer, and a second free layer disposed on the second tunnel barrier layer. The second write electrode is disposed on the second MTJ stack.
    Type: Application
    Filed: December 23, 2022
    Publication date: May 30, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Hsin-Han LEE, Jeng-Hua WEI, Shan-Yi YANG, Yu-Chen HSIN
  • Patent number: 11844288
    Abstract: An in-plane magnetized spin-orbit magnetic device is provided. The in-plane magnetized spin-orbit magnetic device includes a heavy metal layer, an upper electrode and a magnetic tunnel junction. The magnetic tunnel junction is disposed between the heavy metal layer and the upper electrode. The magnetic tunnel junction includes a free layer and a pinned layer. The free layer is disposed on the heavy metal layer, and the free layer has a first film plane area. The pinned layer is disposed on the free layer, and the pinned layer has a second film plane area. There is a preset angle between a long axis direction of a film plane shape of the free layer and a long axis direction of a film plane shape of the pinned layer, and the first film plane area is larger than the second film plane area.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: December 12, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Jeng-Hua Wei, I-Jung Wang, Shan-Yi Yang, Yao-Jen Chang
  • Publication number: 20230178130
    Abstract: An in-plane magnetized spin-orbit magnetic device is provided. The in-plane magnetized spin-orbit magnetic device includes a heavy metal layer, an antiferromagnetic layer, and a magnetic tunnel junction. The antiferromagnetic layer is disposed on the heavy metal layer, and the magnetic tunnel junction is disposed on the antiferromagnetic layer. The magnetic tunnel junction includes a free layer, a barrier layer, and a pinned layer. The barrier layer is disposed on the free layer, and the pinned layer is disposed on the barrier layer. A film surface shape of the free layer is a rounded rectangle.
    Type: Application
    Filed: December 28, 2021
    Publication date: June 8, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Jeng-Hua Wei, I-Jung Wang, Shan-Yi Yang, Yao-Jen Chang, Fang-Ming Chen
  • Publication number: 20220109100
    Abstract: An in-plane magnetized spin-orbit magnetic device is provided. The in-plane magnetized spin-orbit magnetic device includes a heavy metal layer, an upper electrode and a magnetic tunnel junction. The magnetic tunnel junction is disposed between the heavy metal layer and the upper electrode. The magnetic tunnel junction includes a free layer and a pinned layer. The free layer is disposed on the heavy metal layer, and the free layer has a first film plane area. The pinned layer is disposed on the free layer, and the pinned layer has a second film plane area. There is a preset angle between a long axis direction of a film plane shape of the free layer and a long axis direction of a film plane shape of the pinned layer, and the first film plane area is larger than the second film plane area.
    Type: Application
    Filed: February 4, 2021
    Publication date: April 7, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Jeng-Hua Wei, I-Jung Wang, Shan-Yi Yang, Yao-Jen Chang
  • Patent number: 10784441
    Abstract: A perpendicularly magnetized spin-orbit magnetic device including a heavy metal layer, a magnetic tunnel junction, a first antiferromagnetic layer, a first block layer and a first stray field applying layer is provided. The magnetic tunnel junction is disposed on the heavy metal layer. The first block layer is disposed between the magnetic tunnel junction and the first antiferromagnetic layer. The first stray field applying layer is disposed between the first antiferromagnetic layer and the first block layer. The magnetic tunnel junction comprises a free layer, a tunneling barrier layer, and pinned layer. The tunneling barrier layer is disposed on the free layer. The pinned layer is disposed on the tunneling barrier layer. A film plane area of the free layer is greater than a film plane area of the tunneling barrier layer and a film plane area of the pinned layer.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: September 22, 2020
    Assignee: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Shan-Yi Yang, Yao-Jen Chang, I-Jung Wang, Jeng-Hua Wei
  • Patent number: 10725126
    Abstract: A biomolecule magnetic sensor configured to sense magnetic beads attached with biomolecules includes an adsorption pad, a magnetic field line generator and at least one magnetic sensor. The adsorption pad is configured to adsorb the magnetic beads. The magnetic field line generator is configured to generate a plurality of first magnetic field lines, and at least one of the first magnetic field lines passes through the magnetic beads along a first direction to induce a plurality of second magnetic field lines, wherein the magnetic field line generator is disposed between the adsorption pad and the magnetic sensor in the first direction. The magnetic sensor is configured to sense a magnetic field component of at least one of the second magnetic field lines in a second direction. A second shift is provided between the magnetic sensor and the adsorption pad in the second direction.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: July 28, 2020
    Assignee: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Yu-Sheng Chen, Ding-Yeong Wang, Yu-Chen Hsin
  • Publication number: 20200058847
    Abstract: A perpendicularly magnetized spin-orbit magnetic device including a heavy metal layer, a magnetic tunnel junction, a first antiferromagnetic layer, a first block layer and a first stray field applying layer is provided. The magnetic tunnel junction is disposed on the heavy metal layer. The first block layer is disposed between the magnetic tunnel junction and the first antiferromagnetic layer. The first stray field applying layer is disposed between the first antiferromagnetic layer and the first block layer. The magnetic tunnel junction comprises a free layer, a tunneling barrier layer, and pinned layer. The tunneling barrier layer is disposed on the free layer. The pinned layer is disposed on the tunneling barrier layer. A film plane area of the free layer is greater than a film plane area of the tunneling barrier layer and a film plane area of the pinned layer.
    Type: Application
    Filed: October 28, 2019
    Publication date: February 20, 2020
    Applicant: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Shan-Yi Yang, Yao-Jen Chang, I-Jung Wang, Jeng-Hua Wei
  • Patent number: 10553788
    Abstract: A perpendicularly magnetized spin-orbit magnetic device including a heavy metal layer, a magnetic tunnel junction, a first antiferromagnetic layer, a first block layer and a first stray field applying layer is provided. The magnetic tunnel junction is disposed on the heavy metal layer. The first block layer is disposed between the magnetic tunnel junction and the first antiferromagnetic layer. The first stray field applying layer is disposed between the first antiferromagnetic layer and the first block layer. The first stray field applying layer provides a stray magnetic field parallel to a film plane. The first antiferromagnetic layer contacts the first stray field applying layer to define the direction of the magnetic moment in the first stray field applying layer.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: February 4, 2020
    Assignee: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Shan-Yi Yang, Yu-Sheng Chen, Yao-Jen Chang
  • Publication number: 20190123265
    Abstract: A perpendicularly magnetized spin-orbit magnetic device including a heavy metal layer, a magnetic tunnel junction, a first antiferromagnetic layer, a first block layer and a first stray field applying layer is provided. The magnetic tunnel junction is disposed on the heavy metal layer. The first block layer is disposed between the magnetic tunnel junction and the first antiferromagnetic layer. The first stray field applying layer is disposed between the first antiferromagnetic layer and the first block layer. The first stray field applying layer provides a stray magnetic field parallel to a film plane. The first antiferromagnetic layer contacts the first stray field applying layer to define the direction of the magnetic moment in the first stray field applying layer.
    Type: Application
    Filed: December 14, 2018
    Publication date: April 25, 2019
    Applicant: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Shan-Yi Yang, Yu-Sheng Chen, Yao-Jen Chang
  • Patent number: 10193059
    Abstract: A perpendicularly magnetized spin-orbit magnetic device including a heavy metal layer, a magnetic tunnel junction, a first antiferromagnetic layer, a first block layer and a first stray field applying layer is provided. The magnetic tunnel junction is disposed on the heavy metal layer. The first block layer is disposed between the magnetic tunnel junction and the first antiferromagnetic layer. The first stray field applying layer is disposed between the first antiferromagnetic layer and the first block layer. The first stray field applying layer provides a stray magnetic field parallel to a film plane. The first antiferromagnetic layer contacts the first stray field applying layer to define the direction of the magnetic moment in the first stray field applying layer.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: January 29, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Hsin-Han Lee, Shan-Yi Yang, Yu-Sheng Chen, Yao-Jen Chang