Abstract: This disclosure relates to a combined power module that includes a base structure, a terminal structure, a second terminal, and a cover. The terminal structure includes a mount assembly and a plurality of first terminals. The mount assembly is assembled on the base structure. The first terminals are disposed on the mount assembly. The second terminal is disposed on the base structure. The cover is disposed on the base structure and covers at least part of the first terminals and at least part of the second terminal.

Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

Abstract: A semiconductor device is disclosed herein. The semiconductor device includes a routing structure. The routing structure has an intermediate conductive routing layer. The intermediate conductive routing layer includes a first mesh conductive layer formed in a predetermined second region of the semiconductor device and a second mesh conductive layer formed in a predetermined first region of the semiconductor device. The first mesh conductive layer and the second mesh conductive layer are electrically isolated from each other. The intermediate conductive routing layer further includes multiple first conductive islands formed in the predetermined first region and multiple second conductive islands formed in the predetermined second region.

Abstract: A semiconductor die package includes a high dielectric constant (high-k) dielectric layer over a device region of a first semiconductor die that is bonded with a second semiconductor die in a wafer on wafer (WoW) configuration. A through silicon via (TSV) structure may be formed through the device region. The high-k dielectric layer has an intrinsic negative charge polarity that provides a coupling voltage to modify the electric potential in the device region. In particular, the electron carriers in high-k dielectric layer attracts hole charge carriers in device region, which suppresses trap-assist tunnels that result from surface defects formed during etching of the recess for the TSV structure. Accordingly, the high-k dielectric layer described herein reduces the likelihood of (and/or the magnitude of) current leakage in semiconductor devices that are included in the device region of the first semiconductor die.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes: a substrate having a device area and a peripheral area surrounding the device area; a via, disposed at the peripheral area and extending at least partially through the substrate; an insulating structure, disposed at the peripheral area, extending at least partially through the substrate and surrounding the via; and a doped region, disposed at the peripheral area, over or in the substrate and adjacent to the via.

Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: A manufacturing method for a Micro-Electro-Mechanical Systems (MEMS) structure includes implementing a surface modification process, to form a transformation layer on the surfaces of the MEMS structure; implementing an anti-stiction coating pre-clean process, to clean the transformation layer on the surfaces towards a particular direction; and implementing an anti-stiction coating process, to coat a monolayer on the surfaces of the MEMS structure.

Abstract: A manufacturing method for a Micro-Electro-Mechanical Systems (MEMS) structure includes implementing a surface modification process, to form a transformation layer on the surfaces of the MEMS structure; implementing an anti-stiction coating clean process, to clean the transformation layer on the surfaces towards a particular direction; and implementing an anti-stiction coating process, to coat a monolayer on the surfaces of the MEMS structure.

Abstract: A method of detecting whether a microelectromechanical system (MEMS) device is hermetic includes applying at least three voltage differences between a movable part and a sensor electrode of the MEMS device to measure at least three effective capacitances, calculating a capacitance-to-voltage curve and an offset voltage of the MEMS device according to the at least three effective capacitances; and determining whether the offset voltage is within a predetermined range to determine whether MEMS device is hermetic.

Abstract: A method of detecting whether a microelectromechanical system (MEMS) device is hermetic includes applying at least three voltage differences between a movable part and a sensor electrode of the MEMS device to measure at least three effective capacitances, calculating a capacitance-to-voltage curve and an offset voltage of the MEMS device according to the at least three effective capacitances; and determining whether the offset voltage is within a predetermined range to determine whether MEMS device is hermetic.

Abstract: A substrate transport device includes a chamber, a rotary wheel, a first magnet, a carrier, and a second magnet. The rotary wheel is disposed outside the chamber. The first magnet is disposed on the rotary wheel. The carrier is disposed in the chamber. The second magnet is disposed on the carrier.

Abstract: A substrate transport device includes a chamber, a rotary wheel, a first magnet, a carrier, and a second magnet. The rotary wheel is disposed outside the chamber. The first magnet is disposed on the rotary wheel. The carrier is disposed in the chamber. The second magnet is disposed on the carrier.

Abstract: The present invention is to provide an apparatus for storing data comprising a substantially parallelepiped housing, a connector provided at one end of the housing, and at least one volatile memory, a control circuit and power supply means provided therein, wherein the power supply means is able to supply power to both the volatile memory for storing data and the control circuit for maintaining its normal operation. In response to an insertion of the connector to an electronic device, data received from the electronic device via the connector is then processed by the control circuit and then stored in the volatile memory for substantially being read by the electronic device via the control circuit.