Patents by Inventor Hsin-Lung Chung

Hsin-Lung Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128713
    Abstract: A package structure includes: a substrate includes a first surface; a semiconductor chip disposed on the first surface; a support disposed on the first surface and surrounding the semiconductor chip comprises an electrical conducting member and penetrating the support; and an optical component disposed on the support and electrically connected to the substrate by the electrical conducting member.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Hsiu-Ju YANG, Shou-Lung CHEN, Hsin-Chan CHUNG
  • Patent number: 10566320
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: February 18, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chung, Te-Fang Chu
  • Publication number: 20190115330
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chung, Te-Fang Chu
  • Patent number: 10074613
    Abstract: A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: September 11, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hao-Ju Fang, Hsin-Lung Chung, Cho-Hsin Chang, Tsung-Hsien Tsai, Chia-Yang Chen, Chun-Chi Ke
  • Publication number: 20180247886
    Abstract: The disclosure provides a method for manufacturing an electronic package structure, including disposing on a carrier an electronic component and a conductive frame including a plurality of conductive pads and supporting parts; and covering the electronic component and the supporting parts of the conductive frame with an encapsulating layer while allowing the conductive pads to be exposed from the encapsulating layer, thereby increasing the efficiency and reducing the cost of manufacturing processes with the design of the conductive frame. The disclosure further provides the electronic package structure as described above.
    Type: Application
    Filed: May 9, 2017
    Publication date: August 30, 2018
    Inventors: Chih-Hsien Chiu, Tsung-Hsien Tsai, Hsin-Lung Chung, Chen-Wen Huang, Fang-Hsien Shen
  • Patent number: 10062582
    Abstract: A package having ESD (electrostatic discharge) and EMI (electromagnetic interference) preventing functions includes: a substrate unit having a ground structure and an I/O structure disposed therein; at least a semiconductor component disposed on a surface of the substrate unit and electrically connected to the ground structure and the I/O structure; an encapsulant covering the surface of the substrate unit and the semiconductor component; and a metal layer disposed on exposed surfaces of the encapsulant and side surfaces of the substrate unit and electrically insulated from the ground structure, thereby protecting the semiconductor component against ESD and EMI so as to improve the product yield and reduce the risk of short circuits.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: August 28, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Tsung-Hsien Tsai, Chih-Hsien Chiu, Hsin-Lung Chung, Chien-Cheng Lin
  • Patent number: 9997477
    Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: June 12, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
  • Publication number: 20180096967
    Abstract: An electronic package structure is provided, which includes: a plurality of first and second electronic components disposed on opposite sides of a carrier; a blocking member formed between adjacent two of the first electronic components; an encapsulant encapsulating the first and second electronic components and the blocking member; and a shielding element formed on the encapsulant to improve the electromagnetic shielding effect. The present disclosure further provides a method for fabricating the electronic package structure.
    Type: Application
    Filed: February 17, 2017
    Publication date: April 5, 2018
    Inventors: Wen-Jung Tsai, Cheng-Kai Chang, Yen-Hung Lin, Hsin-Lung Chung
  • Publication number: 20180063966
    Abstract: An electronic package structure is provided, which includes: a carrier; at least one electronic component and a plurality of conductive elements disposed on the carrier; a metal frame bonded to the conductive elements; and an encapsulant formed on the carrier and the metal frame and encapsulating the electronic component and the conductive elements. The metal frame is exposed from the encapsulant to serve as an electrical contact. As such, instead of using a mold having a particular size corresponding to the electronic package structure as in the prior art, the present disclosure can use a common mold to form the encapsulant, thereby reducing the fabrication cost. The present disclosure further provides a method for fabricating the electronic package structure.
    Type: Application
    Filed: May 30, 2017
    Publication date: March 1, 2018
    Inventors: Chih-Hsien Chiu, Chen-Wen Huang, Hsin-Lung Chung, Wen-Jung Tsai, Jia-Huei Hung, Fu-Tang Huang
  • Patent number: 9907186
    Abstract: An electronic package structure is provided, which includes: a carrier; at least one electronic component and a plurality of conductive elements disposed on the carrier; a metal frame bonded to the conductive elements; and an encapsulant formed on the carrier and the metal frame and encapsulating the electronic component and the conductive elements. The metal frame is exposed from the encapsulant to serve as an electrical contact. As such, instead of using a mold having a particular size corresponding to the electronic package structure as in the prior art, the present disclosure can use a common mold to form the encapsulant, thereby reducing the fabrication cost. The present disclosure further provides a method for fabricating the electronic package structure.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: February 27, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Chen-Wen Huang, Hsin-Lung Chung, Wen-Jung Tsai, Jia-Huei Hung, Fu-Tang Huang
  • Patent number: 9899335
    Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: February 20, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Cho-Hsin Chang, Chia-Yang Chen, Chao-Ya Yang
  • Publication number: 20170236787
    Abstract: A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.
    Type: Application
    Filed: May 2, 2017
    Publication date: August 17, 2017
    Inventors: Chih-Hsien Chiu, Hao-Ju Fang, Hsin-Lung Chung, Cho-Hsin Chang, Tsung-Hsien Tsai, Chia-Yang Chen, Chun-Chi Ke
  • Patent number: 9673151
    Abstract: A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: June 6, 2017
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hao-Ju Fang, Hsin-Lung Chung, Cho-Hsin Chang, Tsung-Hsien Tsai, Chia-Yang Chen, Chun-Chi Ke
  • Publication number: 20170103953
    Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.
    Type: Application
    Filed: October 20, 2016
    Publication date: April 13, 2017
    Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Cho-Hsin Chang, Chia-Yang Chen, Chao-Ya Yang
  • Patent number: 9526171
    Abstract: A package structure is provided, which includes: a substrate having opposite first and second surfaces; at least an electronic element disposed on the first surface of the substrate; and an encapsulant formed on the first surface of the substrate for encapsulating the electronic element. The encapsulant has a non-rectangular shape so as to reduce an ineffective space in the encapsulant.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: December 20, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Hsin-Lung Chung, Te-Fang Chu, Hao-Ju Fang, Kuang-Neng Chung
  • Patent number: 9508656
    Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: November 29, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Cho-Hsin Chang, Chia-Yang Chen, Chao-Ya Yang
  • Patent number: 9502758
    Abstract: An electronic package is disclosed, which includes: a substrate; at least an electronic element disposed on the substrate; an encapsulant formed on the substrate and encapsulating the electronic element; and an antenna body embedded in the encapsulant without contacting with the substrate and exposed from a surface of the encapsulant. Since the antenna body is not disposed on the substrate, the surface area of the substrate can be reduced to meet the miniaturization requirement of the electronic package.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: November 22, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Hsin-Lung Chung, Hao-Ju Fang, Chih-Hsien Chiu, Yude Chu, Tsung-Hsien Tsai
  • Patent number: 9490219
    Abstract: This invention provides a semiconductor package, including a substrate, a plurality of semiconductor elements disposed on the substrate, at least one shielding member disposed between at least two of the semiconductor elements, and an encapsulant encapsulating the semiconductor elements and shielding members. Through the shielding member, electromagnetic interference caused among semiconductor elements can be prevented.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: November 8, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Cho-Hsin Chang, Tsung-Hsien Hsu, Hsin-Lung Chung, Te-Fang Chu, Chia-Yang Chen
  • Publication number: 20160225728
    Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
    Type: Application
    Filed: April 8, 2016
    Publication date: August 4, 2016
    Inventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
  • Patent number: 9343401
    Abstract: A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: May 17, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Hsin-Lung Chung, Te-Fang Chu, Sheng-Ming Yang, Hung-Cheng Chen, Chia-Yang Chen