Abstract: The present disclosure relates to an integrated chip that includes a substrate, a first metal line, and a hybrid metal line. The first metal line includes a first metal material and is within a first interlayer dielectric (ILD) layer over the substrate. The hybrid metal line is also within the first ILD layer. The hybrid metal line includes a pair of first metal segments that comprise the first metal material. The hybrid metal line further includes a second metal segment that comprises a second metal material that is different from the first metal material. The second metal segment is laterally between the pair of first metal segments.

Abstract: A reconfiguration intelligent surface device and a beamforming method thereof, the beamforming method adapted to the reconfiguration intelligent surface device is described below. A timing synchronization signal is received. A frame boundary synchronized with a radio signal transmission/reflection device is established according to the timing synchronization signal. Beam control information is received. A reflected beam is formed by reflecting a radio signal beam transmitted or reflected by the radio signal transmission/reflection device according to the beam control information based on the frame boundary synchronized with the radio signal transmission/reflection device.

Abstract: A semiconductor device includes a conductive line and a conductive via contacting the conductive line. A first dielectric material contacts a first sidewall surface of the conductive via. A second dielectric material contacts a second sidewall surface of the conductive via. The first dielectric material includes a first material composition, and the second dielectric material includes a second material composition different than the first material composition.

Abstract: An integrated circuit device includes a Janus transition metal dichalcogenide layer, a first gate structure, and a second gate structure. The Janus transition metal dichalcogenide layer has opposite first and second sides. The first gate structure is on the first side of the Janus transition metal dichalcogenide layer. A second gate structure is on the second side of the Janus transition metal dichalcogenide layer.

Abstract: A method for manufacturing a semiconductor structure includes: forming a patterned first layer which is made of a first electrically conductive material, and which includes first lines, second lines, and a connection portion disposed on a part of one of the first lines, the first lines having a height lower than a height of the second lines; forming a first via which is connected to an upper surface of the connection portion, the first via having a height above the connection portion; and forming a second via which is connected to an upper surface of one of the second lines, the second via having a height that is the same as the height of the first via above the connection portion.

Abstract: A cell module is provided. The cell module includes a first substrate; a second substrate disposed opposite to the first substrate; a cell unit disposed between the first substrate and the second substrate; a first thermosetting resin layer disposed between the cell unit and the first substrate; a crosslinked polymer layer disposed between the cell unit and the first thermosetting resin layer; and a second thermosetting resin layer disposed between the cell unit and the second substrate. The crosslinked polymer layer includes a crosslinked polymer, and the crosslinked polymer has a crosslinking degree of from 35.4 to 67.4%.

Abstract: An image sensor comprises a substrate, a plurality of photoelectric transducer devices, an interconnect structure, at least one dielectric isolator and a back-side alignment mark. The substrate has a front-side surface and a back-side surface opposite to the front-side surface. The interconnect structure is disposed on the front-side surface. The photoelectric transducer devices are formed on the front-side surface. The dielectric isolator extends downwards into the substrate from the back-side surface in order to isolate the photoelectric transducer devices. The back-side alignment mark extends downwards into the substrate from the back-side surface and references to a front-side alignment mark previously formed on the front-side surface.

Abstract: A CMOS image sensor, in which an implantation process is performed on substrate under isolation structures each disposed between two adjacent photosensor cell structures. The implantation process is a destructive implantation to form lattice effects/trap centers. No defect repair process is carried out after the implantation process is performed. The implants can reside at the isolation structures or in the substrate under the isolation structures. Dark leakage and crosstalk are thus suppressed.

Abstract: The present disclosure provides a contiguous microlens array, which consists of a plurality of touching microlenses, wherein the adjacent microlenses are connected to each other to form a contiguous microlens array and curvatures of every angle cross section of each microlens are the same. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.

Abstract: An image sensor comprises a substrate, a plurality of photoelectric transducer devices, an interconnect structure, at least one dielectric isolator and a back-side alignment mark. The substrate has a front-side surface and a back-side surface opposite to the front-side surface. The interconnect structure is disposed on the front-side surface. The photoelectric transducer devices are formed on the front-side surface. The dielectric isolator extends downwards into the substrate from the back-side surface in order to isolate the photoelectric transducer devices. The back-side alignment mark extends downwards into the substrate from the back-side surface and references to a front-side alignment mark previously formed on the front-side surface.

Abstract: A method of fabricating a contiguous microlens array is disclosed. First, an array of photoresist patterns is formed, wherein each photoresist pattern has a substantially circular or polygonal shape in a top view and neighboring photoresist patterns are connected with each other or close to each other. Then a reflow step is performed to heat the photoresist patterns thereby rounding a surface of each photoresist pattern and connecting the neighboring photoresist patterns that are close to each other. Finally, a fixing step is performed to fix a shape of each photoresist pattern. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.

Abstract: A method for fabricating a semiconductor device includes steps as following. First, a substrate with an edge-mark is provided. The substrate has a front-side surface and a back-side surface opposite to each other. The front-side surface has an active region and a peripheral region with an alignment mark formed thereon. Next, an optical shielding layer is formed over the back-side surface of the substrate. Next, a first photo mask is aligned to the substrate by standing on the edge-mark. Next, a portion of the optical shielding layer corresponding with the alignment mark is removed by using the first photo mask. Next, a second photo mask is aligned to the substrate by standing on the alignment mark. Then, a portion of the optical shielding layer corresponding with the active region is removed to expose a portion of the substrate by using the second photo mask for forming an optical shielding pattern.

Abstract: A CMOS image sensor, in which an implantation process is performed on substrate under isolation structures each disposed between two adjacent photosensor cell structures. The implantation process is a destructive implantation to form lattice effects/trap centers. No defect repair process is carried out after the implantation process is performed. The implants can reside at the isolation structures or in the substrate under the isolation structures. Dark leakage and crosstalk are thus suppressed.

Abstract: The present disclosure provides a contiguous microlens array, which consists of a plurality of touching microlenses, wherein the adjacent microlenses are connected to each other to form a contiguous microlens array and curvatures of every angle cross section of each microlens are the same. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.

Abstract: A method of fabricating a contiguous microlens array is disclosed. First, an array of photoresist patterns is formed, wherein each photoresist pattern has a substantially circular or polygonal shape in a top view and neighboring photoresist patterns are connected with each other or close to each other. Then a reflow step is performed to heat the photoresist patterns thereby rounding a surface of each photoresist pattern and connecting the neighboring photoresist patterns that are close to each other. Finally, a fixing step is performed to fix a shape of each photoresist pattern. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.

Abstract: A CMOS image sensor, in which an implantation process is performed on substrate under isolation structures each disposed between two adjacent photosensor cell structures. The implantation process is a destructive implantation to form lattice effects/trap centers. No defect repair process is carried out after the implantation process is performed. The implants can reside at the isolation structures or in the substrate under the isolation structures. Dark leakage and crosstalk are thus suppressed.

Abstract: A contiguous microlens array including a plurality of contiguous microlenses is described. Each microlens has substantially circular contours at the heights higher than the connection sections of the microlens with neighboring microlenses, and has substantially partially circular contours at the heights on the connection sections adjacent to the neighboring microlenses. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.

Abstract: A method for forming a color filter is provided. A substrate having a passivation layer thereon is provided. The passivation layer has at least one trench therein within a peripheral region of the substrate. A first color filter layer is formed over the passivation layer to fill the trench by performing a first spin-on coating process with a first spin rate. Thereafter, the first color filter layer is patterned so as to form a plurality of first color filter blocks in a display region of the substrate and expose a portion of the passivation layer. A second color filter layer is formed over the passivation layer by performing a second spin-on coating process with a second spin rate, which is larger than the first spin rate. Next, the second color filter layer is patterned to form a plurality of second color filter blocks between the first color filter blocks respectively.

Abstract: A method for forming microlenses of different curvatures is described, wherein a substrate having at least a first and a second areas different in height is provided. A transparent photosensitive layer having a planar surface is formed on the substrate and then patterned into at least two islands of different thicknesses respectively over the first area and the second area. The at least two islands are heated and softened to form at least two microlenses of different curvatures respectively over the first area and the second area, wherein the higher an area is, the smaller the curvature of the corresponding microlens is.

Abstract: A CMOS image sensor, in which an implantation process is performed on substrate under isolation structures each disposed between two adjacent photosensor cell structures. The implantation process is a destructive implantation to form lattice effects/trap centers. No defect repair process is carried out after the implantation process is performed. The implants can reside at the isolation structures or in the substrate under the isolation structures. Dark leakage and crosstalk are thus suppressed.