Patents by Inventor Hsin-Ta Lin
Hsin-Ta Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11638373Abstract: In a material verification method, information of newly loaded materials in a production line is obtained. It is determined whether the information has been verified. If the information has not been verified, it is determined whether a tray supporting the newly loaded materials has been switched from use in producing a first product to use in producing a second product. If the tray supporting the newly loaded materials is not switched to use in producing the second product, the information of the newly loaded materials is presented to a user for material verification. A system for administering such method and a device applying the method are also disclosed.Type: GrantFiled: September 18, 2020Date of Patent: April 25, 2023Assignees: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Eddy Liu, Zhuan-Feng Li, Hong-Li Tian, Yan-Bing Feng, Guan-Hong Tang, Ya-Hui Xu, Hsin-Ta Lin, Xiao-Juan Zhang
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Publication number: 20220404290Abstract: A detection device includes a cover, a detection module, and a light source. The cover includes a top wall and a sidewall connected to the top wall. The top wall and the sidewall cooperatively define a receiving cavity. The sidewall includes a first portion close to the top wall and a second portion away from the top wall. The detection module is disposed on the top wall. The light source is disposed on the second portion. The influence of heat on proper operation of the detection device is prevented.Type: ApplicationFiled: June 1, 2022Publication date: December 22, 2022Applicants: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., Henan Fuchi Technology Co., Ltd., Henan Fuchi Technology Co., Ltd.Inventors: CHIA-WEI HSU, HSIN-TA LIN
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Publication number: 20220404687Abstract: A detection device includes a substrate, a light source, a detection module, and a heat dissipation module. The substrate includes a first base plate, a second base plate, and at least one connecting portion connecting the first base plate to the second base plate. The light source is disposed on the first base plate. The detection module is disposed on the second base plate. The first base plate has a first surface towards the at least one connecting portion, and the at least one connecting portion has a second surface towards the first base plate. The second surface is connected to a portion of the first surface. The heat dissipation module is disposed on the at least one connecting portion and/or the second base plate, and the influence of heat on proper operation of the detection device is thus prevented.Type: ApplicationFiled: June 1, 2022Publication date: December 22, 2022Inventors: HSIN-TA LIN, CHIA-WEI HSU
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Patent number: 11524834Abstract: A receiving structure providing real-time information as to the materials constituting its contents includes a box body, a first side plate, and a second side plate. The box body, the first side plate, and the second side plate forming a receiving space, and the receiving space receives materials. A discharge port is formed between the second side plate and the first side plate, the discharge port is in communication with the receiving space, and the discharge port is configured to take out the material. A material checking unit is provided on the first side plate, the material checking unit detects and enables real time identification of the materials in the receiving structure.Type: GrantFiled: October 20, 2021Date of Patent: December 13, 2022Assignees: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Eddy Liu, Jun Yan, Chih-Yuan Cheng, Wei-Da Yang, Jun Chen, Er-Wei Chen, Xiao-Ming Lv, Qi Feng, Shu-Fa Jiang, Zhe-Qi Zhao, Hsin-Ta Lin, Han Yang, Jun-Hui Zhang
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Publication number: 20220119189Abstract: A receiving structure providing real-time information as to the materials constituting its contents includes a box body, a first side plate, and a second side plate. The box body, the first side plate, and the second side plate forming a receiving space, and the receiving space receives materials. A discharge port is formed between the second side plate and the first side plate, the discharge port is in communication with the receiving space, and the discharge port is configured to take out the material. A material checking unit is provided on the first side plate, the material checking unit detects and enables real time identification of the materials in the receiving structure.Type: ApplicationFiled: October 20, 2021Publication date: April 21, 2022Inventors: EDDY LIU, JUN YAN, CHIH-YUAN CHENG, WEI-DA YANG, JUN CHEN, ER-WEI CHEN, XIAO-MING LV, QI FENG, SHU-FA JIANG, ZHE-QI ZHAO, HSIN-TA LIN, HAN YANG, JUN-HUI ZHANG
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Publication number: 20220121834Abstract: A receiving structure providing real-time information as to the materials constituting its contents includes a box body, a first side plate, and a second side plate. The box body, the first side plate, and the second side plate forming a receiving space, and the receiving space receives materials. A discharge port is formed between the second side plate and the first side plate, the discharge port is in communication with the receiving space, and the discharge port is configured to take out the material. A material checking unit is provided on the first side plate, the material checking unit detects and enables real time identification of the materials in the receiving structure.Type: ApplicationFiled: October 20, 2021Publication date: April 21, 2022Inventors: EDDY LIU, JUN YAN, CHIH-YUAN CHENG, WEI-DA YANG, JUN CHEN, ER-WEI CHEN, XIAO-MING LV, QI FENG, SHU-FA JIANG, ZHE-QI ZHAO, HSIN-TA LIN, HAN YANG, JUN-HUI ZHANG
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Publication number: 20210360842Abstract: In a material verification method, information of newly loaded materials in a production line is obtained. It is determined whether the information has been verified. If the information has not been verified, it is determined whether a tray supporting the newly loaded materials has been switched from use in producing a first product to use in producing a second product. If the tray supporting the newly loaded materials is not switched to use in producing the second product, the information of the newly loaded materials is presented to a user for material verification. A system for administering such method and a device applying the method are also disclosed.Type: ApplicationFiled: September 18, 2020Publication date: November 18, 2021Inventors: EDDY LIU, ZHUAN-FENG LI, HONG-LI TIAN, YAN-BING FENG, GUAN-HONG TANG, YA-HUI XU, HSIN-TA LIN, XIAO-JUAN ZHANG
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Patent number: 10199345Abstract: A substrate structure is provided, which includes: a substrate body having a plurality of conductive pads; an insulating layer formed on the substrate body and exposing the conductive pads; a plurality of conductive vias formed in the insulating layer and electrically connected to the conductive pads; a plurality of circuits formed on the conductive vias and in the insulating layer, wherein the circuits are greater in width than the conductive vias; and a plurality of conductive posts formed on the circuits and the insulating layer, wherein each of the conductive posts has a width greater than or equal to that of each of the circuits. The conductive vias, the circuits and the conductive posts are integrally formed. As such, micro-chips or fine-pitch conductive pads can be electrically connected to the substrate structure in a flip-chip manner.Type: GrantFiled: January 10, 2018Date of Patent: February 5, 2019Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Hsin-Ta Lin, Ching-Wen Chiang
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Publication number: 20180138140Abstract: A substrate structure is provided, which includes: a substrate body having a plurality of conductive pads; an insulating layer formed on the substrate body and exposing the conductive pads; a plurality of conductive vias formed in the insulating layer and electrically connected to the conductive pads; a plurality of circuits formed on the conductive vias and in the insulating layer, wherein the circuits are greater in width than the conductive vias; and a plurality of conductive posts formed on the circuits and the insulating layer, wherein each of the conductive posts has a width greater than or equal to that of each of the circuits. The conductive vias, the circuits and the conductive posts are integrally formed. As such, micro-chips or fine-pitch conductive pads can be electrically connected to the substrate structure in a flip-chip manner.Type: ApplicationFiled: January 10, 2018Publication date: May 17, 2018Inventors: Hsin-Ta Lin, Ching-Wen Chiang
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Patent number: 9899344Abstract: A substrate structure is provided, which includes: a substrate body having a plurality of conductive pads; an insulating layer formed on the substrate body and exposing the conductive pads; a plurality of conductive vias formed in the insulating layer and electrically connected to the conductive pads; a plurality of circuits formed on the conductive vias and in the insulating layer, wherein the circuits are greater in width than the conductive vias; and a plurality of conductive posts formed on the circuits and the insulating layer, wherein each of the conductive posts has a width greater than or equal to that of each of the circuits. The conductive vias, the circuits and the conductive posts are integrally formed. As such, micro-chips or fine-pitch conductive pads can be electrically connected to the substrate structure in a flip-chip manner.Type: GrantFiled: December 28, 2015Date of Patent: February 20, 2018Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Hsin-Ta Lin, Ching-Wen Chiang
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Publication number: 20160358873Abstract: A substrate structure is provided, which includes: a substrate body having a plurality of conductive pads; an insulating layer formed on the substrate body and exposing the conductive pads; a plurality of conductive vias formed in the insulating layer and electrically connected to the conductive pads; a plurality of circuits formed on the conductive vias and in the insulating layer, wherein the circuits are greater in width than the conductive vias; and a plurality of conductive posts formed on the circuits and the insulating layer, wherein each of the conductive posts has a width greater than or equal to that of each of the circuits. The conductive vias, the circuits and the conductive posts are integrally formed. As such, micro-chips or fine-pitch conductive pads can be electrically connected to the substrate structure in a flip-chip manner.Type: ApplicationFiled: December 28, 2015Publication date: December 8, 2016Inventors: Hsin-Ta Lin, Ching-Wen Chiang
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Patent number: 9356008Abstract: A semiconductor package is provided, which includes: a first semiconductor device having a first top surface and a first bottom surface opposite to the first top surface; a plurality of conductive balls formed on the first top surface of the first semiconductor device; a second semiconductor device having a second top surface and a second bottom surface opposite to the second top surface; and a plurality of conductive posts formed on the second bottom surface of the second semiconductor device and correspondingly bonded to the conductive balls for electrically connecting the first semiconductor device and the second semiconductor device, wherein the conductive posts have a height less than 300 um. Therefore, the present invention can easily control the height of the semiconductor package and is applicable to semiconductor packages having fine-pitch conductive balls.Type: GrantFiled: February 6, 2015Date of Patent: May 31, 2016Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Cheng-Chia Chiang, Hsin-Ta Lin, Fu-Tang Huang, Yu-Po Wang, Lung-Yuan Wang, Chu-Chi Hsu, Chia-Kai Shih
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Publication number: 20160020195Abstract: A semiconductor package is provided, which includes: a first semiconductor device having a first top surface and a first bottom surface opposite to the first top surface; a plurality of conductive balls formed on the first top surface of the first semiconductor device; a second semiconductor device having a second top surface and a second bottom surface opposite to the second top surface; and a plurality of conductive posts formed on the second bottom surface of the second semiconductor device and correspondingly bonded to the conductive balls for electrically connecting the first semiconductor device and the second semiconductor device, wherein the conductive posts have a height less than 300 um. Therefore, the present invention can easily control the height of the semiconductor package and is applicable to semiconductor packages having fine-pitch conductive balls.Type: ApplicationFiled: February 6, 2015Publication date: January 21, 2016Inventors: Cheng-Chia Chiang, Hsin-Ta Lin, Fu-Tang Huang, Yu-Po Wang, Lung-Yuan Wang, Chu-Chi Hsu, Chia-Kai Shih
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Patent number: 8649165Abstract: An electronic apparatus and a display panel module are disclosed. The display panel module includes a frame, a display panel, and a removable element. A first end of the removable element is fixed on the display panel, and a second end of the removable element is removably fixed on an inner wall of the frame to make the display panel not contact with the frame.Type: GrantFiled: March 18, 2012Date of Patent: February 11, 2014Assignee: Pegatron CorporationInventors: Hsin-Ta Lin, Po-Shou Chou, Ching-Feng Hsu
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Publication number: 20120236482Abstract: An electronic apparatus and a display panel module are disclosed. The display panel module includes a frame, a display panel, and a removable element. A first end of the removable element is fixed on the display panel, and a second end of the removable element is removably fixed on an inner wall of the frame to make the display panel not contact with the frame.Type: ApplicationFiled: March 18, 2012Publication date: September 20, 2012Applicant: PEGATRON CORPORATIONInventors: Hsin-Ta Lin, Po-Shou Chou, Ching-Feng Hsu