Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.

Abstract: A capacitor on a fin structure includes a fin structure. A dielectric layer covers the fin structure. A first electrode extension is embedded within the fin structure. A first electrode penetrates the dielectric layer and contacts the first electrode extension. A second electrode and a capacitor dielectric layer are disposed within the dielectric layer. The capacitor dielectric layer surrounds the second electrode, and the capacitor dielectric layer is between the second electrode and the first electrode extension.

Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.

Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: An optical proximity correction method includes: obtaining a test mask; obtaining wafer data under current photolithography conditions by the test mask; establishing an optical proximity correction model and a process variation band model by the wafer data; correcting a target pattern according to the optical proximity correction model and the process variation band model to obtain a first correction pattern and a second correction pattern respectively; calculating a difference value between a first simulation contour of the first correction pattern and a second simulation contour of the second correction pattern; and adjusting a correction mode for the target pattern according to the difference value.

Abstract: A method for generating a reference voltage is provided. The method for generating a reference voltage includes the following steps: providing a voltage identification signal corresponding to an operating frequency of a processor; receiving the voltage identification signal and providing a reference voltage according to the operating frequency; determining whether the reference voltage is greater than a first threshold voltage or less than a second threshold voltage; regulating the reference voltage corresponding to the voltage identification signal by adding a first offset voltage when the reference voltage is greater than the first threshold voltage; and regulating the reference voltage corresponding to the voltage identification signal by subtracting a second offset voltage when the reference voltage is less than the second threshold voltage. In addition, an electronic device using the method for generating a reference voltage is also provided.

Abstract: A method for generating a reference voltage is provided. The method for generating a reference voltage includes the following steps: providing a voltage identification signal corresponding to an operating frequency of a processor; receiving the voltage identification signal and providing a reference voltage according to the operating frequency; determining whether the reference voltage is greater than a first threshold voltage or less than a second threshold voltage; regulating the reference voltage corresponding to the voltage identification signal by adding a first offset voltage when the reference voltage is greater than the first threshold voltage; and regulating the reference voltage corresponding to the voltage identification signal by subtracting a second offset voltage when the reference voltage is less than the second threshold voltage. In addition, an electronic device using the method for generating a reference voltage is also provided.

Abstract: A motherboard with dual memory slot is disclosed. The motherboard includes multiple first memory slots, multiple second memory slots, a storage unit, and a CPU. The first and second memory slots are used for connecting with memory modules of different specifications. A storage unit stores BIOS which identifies the specification of the memory module in booting, and the identification result is provided to the CPU. Consequently, the memory controller in the CPU controls the reading and writing to the memory module according the determining result of the BIOS. As a result, a single motherboard supports memory modules of different specifications, and the flexibility of using the memory modules is improved.

Abstract: The invention discloses a computer and an expandable power supply system. The expandable power supply system includes N interface units, a determination unit, and a voltage converting unit. N is an integer equal to or more than two. The interface units are electrically connected with at least one power supplies and switching the levels of (N?1) control signals according to conductance of the power supplies. When the interface units are electrically connected with 1st to Mth power supplies, the determination unit outputs a start signal when the determination unit receives power reply signals provided by the 1st to Mth power supplies. M is an integer, and 1?M?N. The voltage converting unit is enabled according to the start signal to distribute operation voltages provided by the 1st to Mth power supplies by utilizing the control signals to generate a supply voltage.

Abstract: The invention discloses a computer and an expandable power supply system. The expandable power supply system includes N interface units, a determination unit, and a voltage converting unit. N is an integer equal to or more than two. The interface units are electrically connected with at least one power supplies and switching the levels of (N?1) control signals according to conductance of the power supplies. When the interface units are electrically connected with 1st to Mth power supplies, the determination unit outputs a start signal when the determination unit receives power reply signals provided by the 1st to Mth power supplies. M is an integer, and 1?M?N. The voltage converting unit is enabled according to the start signal to distribute operation voltages provided by the 1st to Mth power supplies by utilizing the control signals to generate a supply voltage.