Patents by Inventor Hsin-Yu Chen

Hsin-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220382069
    Abstract: Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, and wherein the conductive layer is formed over at least one of the following: the first surface of the first dielectric layer and a portion of sidewalls of each of the plurality of via holes, and wherein the conductive layer is configured so as to allow the optical collimator to filter light in a range of wavelengths.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Hsin-Yu CHEN, Yen-Chiang Liu, Jiun-Jie Chiou, Jia-Syuan Li, You-Cheng Jhang, Shin-Hua Chen, Lavanya Sanagavarapu, Han-Zong Pan, Chun-Peng Li, Chia-Chun Hung, Ching-Hsiang Hu, Wei-Ding Wu, Jui-Chun Weng, Ji-Hong Chiang, Hsi-Cheng Hsu
  • Patent number: 11514707
    Abstract: Optical sensors and their making methods are described herein. In some embodiments, a described sensing apparatus includes: an image sensor; a collimator above the image sensor, wherein the collimator includes an array of apertures; and an optical filtering layer above the collimator, wherein the optical filtering layer is configured to filter a portion of light to be transmitted into the array of apertures.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: November 29, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: You-Cheng Jhang, Han-Zong Pan, Wei-Ding Wu, Jui-Chun Weng, Hsin-Yu Chen, Cheng-San Chou, Chin-Min Lin
  • Publication number: 20220373815
    Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.
    Type: Application
    Filed: August 4, 2022
    Publication date: November 24, 2022
    Inventors: Hsin-Yu CHEN, Chun-Peng LI, Chia-Chun HUNG, Ching-Hsiang HU, Wei-Ding WU, Jui-Chun WENG, Ji-Hong CHIANG, Yen-Chiang LIU, Jiun-Jie CHIOU, Li-Yang TU, Jia-Syuan LI, You-Cheng JHANG, Shin-Hua CHEN, Lavanya SANAGAVARAPU, Han-Zong PAN, Hsi-Cheng HSU
  • Patent number: 11508724
    Abstract: A composite power element includes a substrate structure, an insulation layer, a dielectric layer, a MOSFET, and a Zener diode. The MOSFET is formed in a transistor formation region of the substrate structure. The Zener diode is formed in a circuit element formation region of the substrate structure, and includes a Zener diode doping structure that is formed in the substrate structure and is covered by the insulation layer. The Zener diode doping structure includes a first P-type doped region and a first N-type doped region that is formed on an inner side of the first P-type doped region. The Zener diode further includes a Zener diode metal structure that is formed on the dielectric layer and sequentially passes through the dielectric layer and the insulation layer to be electrically connected to the first P-type doped region and the first N-type doped region.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: November 22, 2022
    Assignee: CYSTECH ELECTRONICS CORP.
    Inventors: Hsin-Yu Hsu, Yung-Chang Chen
  • Publication number: 20220367728
    Abstract: A semiconductor device includes a substrate, two source/drain features over the substrate, channel layers connecting the two source/drain features, and a gate structure wrapping around each of the channel layers. Each of the two source/drain features include a first epitaxial layer, a second epitaxial layer over the first epitaxial layer, and a third epitaxial layer on inner surfaces of the second epitaxial layer. The channel layers directly interface with the second epitaxial layers and are separated from the third epitaxial layers by the second epitaxial layers. The first epitaxial layers include a first semiconductor material with a first dopant. The second epitaxial layers include the first semiconductor material with a second dopant. The second dopant has a higher mobility than the first dopant.
    Type: Application
    Filed: May 13, 2021
    Publication date: November 17, 2022
    Inventors: Shih-Hao Lin, Chih-Hsuan Chen, Chia-Hao Pao, Chih-Chuan Yang, Chih-Yu Hsu, Hsin-Wen Su, Chia-Wei Chen
  • Publication number: 20220365423
    Abstract: A portion of a buffer layer on a backside of a substrate of a photomask assembly may be removed prior to formation of one or more capping layers on the backside of the substrate. The one or more capping layers may be formed directly on the backside of the substrate where the buffer layer is removed from the substrate, and a hard mask layer may be formed directly on the one or more capping layers. The one or more capping layers may include a low-stress material to promote adhesion between the one or more capping layers and the substrate, and to reduce and/or minimize peeling and delamination of the capping layer(s) from the substrate. This may reduce the likelihood of damage to the pellicle layer and/or other components of the photomask assembly and/or may increase the yield of an exposure process in which the photomask assembly is used.
    Type: Application
    Filed: July 18, 2022
    Publication date: November 17, 2022
    Inventors: Kuo-Hao LEE, Hsi-Cheng HSU, Jui-Chun WENG, Han-Zong PAN, Hsin-Yu CHEN, You-Cheng JHANG
  • Publication number: 20220365424
    Abstract: A photomask assembly may be formed such that stress relief trenches are formed in a pellicle frame of the photomask assembly. The stress relief trenches may reduce or prevent damage to a pellicle that may otherwise result from deformation of the pellicle. The stress relief trenches may be formed in areas of the pellicle frame to allow the pellicle frame to deform with the pellicle, thereby reducing the amount damage to the pellicle caused by the pellicle frame.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Kuo-Hao LEE, You-Cheng JHANG, Han-Zong PAN, Jui-Chun WENG, Chiu-Hua CHUNG, Sheng-Yuan LIN, Hsin-Yu CHEN
  • Publication number: 20220367391
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The semiconductor structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first oxide layer formed below the a first substrate, a first bonding layer formed below the first oxide layer, and a first bonding via formed through the first bonding layer and the first oxide layer. The second semiconductor device includes a second oxide layer formed over a second substrate, a second bonding layer formed over the second oxide layer, and a second bonding via formed through the second bonding layer and the second oxide layer. The semiconductor structure also includes a bonding structure between the first substrate and the second substrate, and the bonding structure includes the first bonding via bonded to the second bonding via.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Yu WEI, Cheng-Yuan LI, Yen-Liang LIN, Kuo-Cheng LEE, Hsun-Ying HUANG, Hsin-Chi CHEN
  • Patent number: 11500261
    Abstract: An electrophoretic display and a driving method thereof are provided. The electrophoretic display includes a display panel and a driving circuit. The display panel includes an electrophoretic unit and a driving substrate. The electrophoretic unit includes a plurality of electrophoretic particles. The driving substrate is disposed below the electrophoretic unit. The driving circuit is coupled to the driving substrate. The driving circuit sequentially provides a first reset signal and a second reset signal to the driving substrate during a reset period to reset the plurality of electrophoretic particles. The first reset signal sequentially includes a first sub-balanced signal and a first sub-mixed signal. The second reset signal sequentially includes a second sub-balanced signal and a second sub-mixed signal.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: November 15, 2022
    Assignee: E Ink Holdings Inc.
    Inventors: Hsin-I Wu, Chien-Hung Chen, Chen-Kai Chiu, Chih-Yu Cheng
  • Patent number: 11498167
    Abstract: An automatic nut screwing device includes a positioning mold plate, a screw shaft, driving gear elements having driving gears, and transmission screwing elements having transmission screw gear units, bolt heads and bolt bodies. The transmission screw gear unit engages an upper out surface of the bolt head. The bolt head of each transmission screw element is fixed with the positioning mold plate. The shaft engaging portion engages with the transmission screw gear unit. The transmission screw gear unit engages with the driving gears such that the transmission screw gear unit is driven to rotate by the shaft engaging portion. A nut socket placing element has nut sockets when the screw shaft is axially rotated to enable the shaft engaging portion of the screw shaft to drive the transmission screw elements, thereby successively rotating elements that result in screw body being rotated to screw with the nut.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: November 15, 2022
    Assignee: SUMEEKO INDUSTRIES CO., LTD.
    Inventors: Hsin Wei Lee, Kuang Yu Chen, Shen Fu Wu, Ming Yuan Chen
  • Publication number: 20220319783
    Abstract: A backlight module applicable to a key module is provided, the key module includes a plurality of key units and a baseplate, and the plurality of key units are disposed on the baseplate. The backlight module includes a lower substrate, a plurality of periphery light sources disposed along the peripheral of the baseplate, and a shielding structure. The lower substrate is disposed below the baseplate, and there is an outer edge gap between an outer edge of the baseplate and the lower substrate. The periphery light sources are disposed between the baseplate and the lower substrate. The shielding structure is disposed outside those periphery light sources distributed, to prevent light provided by the plurality of light sources from being emitted out of the outer edge gap.
    Type: Application
    Filed: March 21, 2022
    Publication date: October 6, 2022
    Inventors: Hsin-Hung LIU, Chao-Yu CHEN
  • Publication number: 20220321846
    Abstract: The disclosure provides a time-lapse photographic device. The time-lapse photographic device includes a camera module, a drive module, an environment detection module, and a control unit. The drive module is connected to the camera module to drive the camera module to rotate. The environment detection module is configured to detect an external environment of the time-lapse photographic device to generate an environment detection signal. The control unit is electrically connected to the camera module, the drive module, and the environment detection module. The control unit generates, according to a shooting stop parameter, a plurality of intermittent drive signals to control the drive module, and controls the camera module to shoot at intervals of the drive signals. The control unit adjusts operation of at least one of the camera module and the drive module according to the environment detection signal.
    Type: Application
    Filed: February 15, 2022
    Publication date: October 6, 2022
    Inventors: Hsin-Yi PU, Kai-Yu HSU, Lai-Peng WONG, Chieh LI, Ting-Han CHANG, Ching-Xsuan CHEN
  • Publication number: 20220321863
    Abstract: A stereoscopic image display device is provided and includes a flat panel display unit, a lens array unit, and a spacer unit. The flat panel display unit has a display surface. The lens array unit includes at least one condenser lens, which is disposed on a side of the display surface. The spacer unit is disposed between the display surface and the condenser lens, such that the lens array unit and the flat panel display unit are spaced apart from each other.
    Type: Application
    Filed: July 8, 2021
    Publication date: October 6, 2022
    Inventors: CHUN-HSIANG YANG, CHIH-HUNG TING, KAI-CHIEH CHANG, HSIN-YOU HOU, KUAN-YU CHEN
  • Patent number: 11456263
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first bonding layer formed below a first substrate, a first bonding via formed through the first oxide layer and the first bonding layer, a first dummy pad formed in the first bonding layer. The semiconductor structure includes a second semiconductor device. The second semiconductor device includes a second bonding layer formed over a second substrate, a second bonding via formed through the second bonding layer, and a second dummy pad formed in the second bonding layer. The semiconductor structure includes a bonding structure between the first substrate and the second substrate, wherein the bonding structure includes the first bonding via bonded to the second bonding via and the first dummy pad bonded to the second dummy pad.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Yu Wei, Cheng-Yuan Li, Yen-Liang Lin, Kuo-Cheng Lee, Hsun-Ying Huang, Hsin-Chi Chen
  • Patent number: 11454820
    Abstract: Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Yu Chen, Yen-Chiang Liu, Jiun-Jie Chiou, Jia-Syuan Li, You-Cheng Jhang, Shin-Hua Chen, Lavanya Sanagavarapu, Han-Zong Pan, Chun-Peng Li, Chia-Chun Hung, Ching-Hsiang Hu, Wei-Ding Wu, Jui-Chun Weng, Ji-Hong Chiang, Hsi-Cheng Hsu
  • Patent number: 11448891
    Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: September 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Yu Chen, Chun-Peng Li, Chia-Chun Hung, Ching-Hsiang Hu, Wei-Ding Wu, Jui-Chun Weng, Ji-Hong Chiang, Yen-Chiang Liu, Jiun-Jie Chiou, Li-Yang Tu, Jia-Syuan Li, You-Cheng Jhang, Shin-Hua Chen, Lavanya Sanagavarapu, Han-Zong Pan, Hsi-Cheng Hsu
  • Publication number: 20220294211
    Abstract: Systems and methods are provided for fail-safe protection of circuitry from electrostatic discharge due through input and output connections. The power circuitry may include a string of diodes, connections to power lines, and particular diodes for voltage pull-up and pull-down clamping. There may be both a pull-up third diode in the diode string for connection between I/O and VDD and a pull-down third diode between I/O and VSS. During an ESD event the ESD device is configured to hold voltage from exceeding a threshold voltage and damaging internal circuitry. During operational mode the ESD device is turned off and does not interfere with circuit operations.
    Type: Application
    Filed: September 24, 2021
    Publication date: September 15, 2022
    Inventors: Tzu-Heng Chang, Hsin-Yu Chen
  • Publication number: 20220293650
    Abstract: A semiconductor device includes a plurality of isolation structures, wherein each isolation structure of the plurality of isolation structures is spaced from an adjacent isolation structure of the plurality of isolation structures in a first direction. The semiconductor device further includes a gate structure. The gate structure includes a top surface; a first sidewall angled at a non-perpendicular angle with respect to the top surface; and a second sidewall angled with respect to the top surface. The gate structure further includes a first horizontal surface extending between the first sidewall and the second sidewall, wherein the first horizontal surface is parallel to the top surface, and a dimension of the gate structure in a second direction, perpendicular to the first direction, is less than a dimension of each of the plurality of isolation structures in the second direction.
    Type: Application
    Filed: June 2, 2022
    Publication date: September 15, 2022
    Inventors: Chia-Yu WEI, Fu-Cheng CHANG, Hsin-Chi CHEN, Ching-Hung KAO, Chia-Pin CHENG, Kuo-Cheng LEE, Hsun-Ying HUANG, Yen-Liang LIN
  • Publication number: 20220295183
    Abstract: A headphone and a headphone status detection method are provided. A signal processor of the headphone transmits a plurality of code messages to a first audio playback unit, so that the first audio playback unit plays a plurality of first audio signals with different frequencies corresponding to the code messages according to a playback sequence. The signal processor obtains a plurality of first time points at which a first audio receiving unit receives the first audio signals that are reflected for the first time. The signal processor determines a wear status of the headphone according to the plurality of first time points.
    Type: Application
    Filed: June 1, 2022
    Publication date: September 15, 2022
    Applicant: LUXSHARE-ICT CO., LTD.
    Inventors: Hsin-Nan Chen, Tsung-Pao Hsu, Jung-Pin Chien, Yao-Chun Tsai, You-Yu Lin
  • Publication number: 20220291821
    Abstract: The disclosure provides a control method, applicable to an electronic device. The control method includes: detecting a sliding operation from a first position to a second position on a touch screen of the electronic device, where the first position is an edge area of the touch screen and the second position is a position in which the sliding operation stops; calculating an angle of the sliding operation based on the first position and the second position; and comparing the angle with a threshold to determine whether to activate a one-handed operation mode of the electronic device.
    Type: Application
    Filed: March 4, 2022
    Publication date: September 15, 2022
    Inventors: Yun-Ju CHEN, Chen-Yu HSU, Chih-Hsien YANG, I-Hsi WU, Hsin-Yi PU