Patents by Inventor HSIN YU LI
HSIN YU LI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250079853Abstract: A power generating device and a power supplying method thereof are provided. The power generating device includes a battery set, a charge storage device, a charger and a voltage converter. The battery set has microbial fuel cell and/or solar battery, and is configured to generate a supply voltage. The charger generates a charging voltage according to the supply voltage, and provides the charging voltage through a first resistor to charge the charge storage device. The voltage converter converts a storage voltage provided by the charge storage device to generate a driving voltage, and provides the driving voltage to drive a load.Type: ApplicationFiled: October 20, 2023Publication date: March 6, 2025Applicant: National Tsing Hua UniversityInventors: Chao-I Liu, Heng-An Su, I-Chu Lin, Yao-Yu Lin, Chia-Chieh Hsu, Hsin-Tien Li, Tzu-Yin Liu, Han-Yi Chen
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Publication number: 20250079492Abstract: A plant microbial fuel cell includes a planting container, a plant, a cathode and an anode. The planting container has a culture medium therein, and a microbial population is in the culture medium. The plant is grown in the culture medium in the planting container. The cathode is disposed on a surface of the culture medium, and the anode is arranged in the culture medium close to roots of the plant. The anode includes a porous carbon material prepared from coffee grounds, and thus the overall cost of the plant microbial fuel cell may be greatly reduced, and the porous carbon material is easy to process and has high biocompatibility.Type: ApplicationFiled: October 19, 2023Publication date: March 6, 2025Applicant: National Tsing Hua UniversityInventors: Yao-Yu Lin, Hsin-Tien Li, Heng-An Su, Tzu-Yin Liu, Han-Yi Chen
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Publication number: 20250032621Abstract: A drug conjugate includes a structure shown by the following formula: Z-(linker-[R]m)n. In the formula, Z is a drug compound, R is a sugar, and m and n are independently an integer from 1 to 6. The drug compound Z is a hepatitis virus targeting drug, a hepatitis B virus (HBV) drug, an inhibitor of apoptosis protein (IAP) antagonist, a multidrug resistance (MDR) inhibitor, or analogues, precursors, prodrugs, derivatives thereof.Type: ApplicationFiled: May 30, 2024Publication date: January 30, 2025Applicant: SeeCure Taiwan Co., Ltd.Inventors: Wuu-Jyh Lin, Min-Ching Chung, Chi-Shiang Ke, Ya-Chen Tseng, Chin-Yu Liang, Yen-Chun Lee, Hsin-Jou Li, Tai-Yun Huang, Nai-Chen Hsueh, Yan-Feng Jiang
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Publication number: 20240339019Abstract: A system for monitoring usage of an electrical appliance includes an electrical socket device and a server. The electrical socket device includes an audio receiving module for generating an audio result based on sound at a site where the electrical appliance is disposed, and a processing module configured to generate audio feature data based on the audio result and to generate event data that is related to the usage of the electrical appliance at least based on the audio feature data. The server stores a behavioral feature recognition model that is configured to recognize multiple behavioral features related to behaviors of the user using the electrical appliance. The server uses the behavioral feature recognition model to determine whether the event data matches one of the behavioral feature, and sends a warning message to a user end device when the event data does not match any of the behavioral features.Type: ApplicationFiled: June 20, 2024Publication date: October 10, 2024Inventors: Hui-Ming PAN, Hsiu-Ping CHOU, Hung-Yao WU, Hsin-Yu LI, Chun-Yu MAK
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Publication number: 20240128152Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first package, wherein the first package comprises, a first package substrate, a first die over the first package substrate, a first mold layer over the first package substrate and around the first die, and a plurality of through mold interconnects (TMIs) through the first mold layer. The electronic package may further comprise a second package electrically coupled the first package by the TMIs, wherein the second package comprises a second package substrate, a second die over the second package substrate, and a solder resist over a surface of the second package substrate opposite from the second die. In an embodiment, the electronic package may also comprise a barrier between the first package and the second package.Type: ApplicationFiled: December 28, 2023Publication date: April 18, 2024Inventors: Elizabeth NOFEN, Shripad GOKHALE, Nick ROSS, Amram EITAN, Nisha ANANTHAKRISHNAN, Robert M. NICKERSON, Purushotham Kaushik MUTHUR SRINATH, Yang GUO, John C. DECKER, Hsin-Yu LI
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Patent number: 11935861Abstract: Disclosed herein are structures and techniques for underfill flow management in electronic assemblies. For example, in some embodiments, an electronic assembly may include a first component, a second component, an underfill on the first component and at least partially between the first component and the second component, and a material at a surface of the first component, wherein the material is outside a footprint of the second component, and the underfill contacts the material with a contact angle greater than 50 degrees.Type: GrantFiled: April 29, 2020Date of Patent: March 19, 2024Assignee: Intel CoroprationInventors: Frederick W. Atadana, Taylor William Gaines, Edvin Cetegen, Wei Li, Hsin-Yu Li, Tony Dambrauskas
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Publication number: 20240021493Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first package, wherein the first package comprises, a first package substrate, a first die over the first package substrate, a first mold layer over the first package substrate and around the first die, and a plurality of through mold interconnects (TMIs) through the first mold layer. The electronic package may further comprise a second package electrically coupled the first package by the TMIs, wherein the second package comprises a second package substrate, a second die over the second package substrate, and a solder resist over a surface of the second package substrate opposite from the second die. In an embodiment, the electronic package may also comprise a barrier between the first package and the second package.Type: ApplicationFiled: September 28, 2023Publication date: January 18, 2024Inventors: Elizabeth NOFEN, Shripad GOKHALE, Nick ROSS, Amram EITAN, Nisha ANANTHAKRISHNAN, Robert M. NICKERSON, Purushotham Kaushik MUTHUR SRINATH, Yang GUO, John C. DECKER, Hsin-Yu LI
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Publication number: 20240014097Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first package, wherein the first package comprises, a first package substrate, a first die over the first package substrate, a first mold layer over the first package substrate and around the first die, and a plurality of through mold interconnects (TMIs) through the first mold layer. The electronic package may further comprise a second package electrically coupled the first package by the TMIs, wherein the second package comprises a second package substrate, a second die over the second package substrate, and a solder resist over a surface of the second package substrate opposite from the second die. In an embodiment, the electronic package may also comprise a barrier between the first package and the second package.Type: ApplicationFiled: September 25, 2023Publication date: January 11, 2024Inventors: Elizabeth NOFEN, Shripad GOKHALE, Nick ROSS, Amram EITAN, Nisha ANANTHAKRISHNAN, Robert M. NICKERSON, Purushotham Kaushik MUTHUR SRINATH, Yang GUO, John C. DECKER, Hsin-Yu LI
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Publication number: 20230317668Abstract: Embodiments herein relate to systems, apparatuses, or processes that include barriers, which may be referred to as flow stops, to modulate, or control, the speed of flow of an underfill between the substrate and another object on the substrate, for example one or more dies coupled with the substrate. Moderating the speed of flow of the underfill reduces the number of voids in the underfill after curing. Other embodiments may be described and/or claimed.Type: ApplicationFiled: March 30, 2022Publication date: October 5, 2023Inventors: Ziyin LIN, Wei LI, Jingyi HUANG, Hsin-Yu LI
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Publication number: 20210343677Abstract: Disclosed herein are structures and techniques for underfill flow management in electronic assemblies. For example, in some embodiments, an electronic assembly may include a first component, a second component, an underfill on the first component and at least partially between the first component and the second component, and a material at a surface of the first component, wherein the material is outside a footprint of the second component, and the underfill contacts the material with a contact angle greater than 50 degrees.Type: ApplicationFiled: April 29, 2020Publication date: November 4, 2021Applicant: Intel CorporationInventors: Frederick W. Atadana, Taylor William Gaines, Edvin Cetegen, Wei Li, Hsin-Yu Li, Tony Dambrauskas
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Publication number: 20210066155Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first package, wherein the first package comprises, a first package substrate, a first die over the first package substrate, a first mold layer over the first package substrate and around the first die, and a plurality of through mold interconnects (TMIs) through the first mold layer. The electronic package may further comprise a second package electrically coupled the first package by the TMIs, wherein the second package comprises a second package substrate, a second die over the second package substrate, and a solder resist over a surface of the second package substrate opposite from the second die. In an embodiment, the electronic package may also comprise a barrier between the first package and the second package.Type: ApplicationFiled: August 30, 2019Publication date: March 4, 2021Inventors: Elizabeth NOFEN, Shripad GOKHALE, Nick ROSS, Amram EITAN, Nisha ANANTHAKRISHNAN, Robert M. NICKERSON, Purushotham Kaushik MUTHUR SRINATH, Yang GUO, John C. DECKER, Hsin-Yu LI
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Publication number: 20200006169Abstract: A structure including a barrier is described. In embodiments, a micro-electronic component may have a first face and a second face, wherein the second face includes interconnect structures and is opposite the first face. A fill material, such as a capillary underfill material (CUF), may fill a gap between the micro-electronic component and the substrate and substantially surround the interconnect structures. In embodiments, a barrier structure may be located on the surface of the substrate and along a perimeter or outside perimeter of the micro-electronic component, wherein a height of the barrier structure exceeds a height of the fill material in at least a portion of an open region of the substrate to confine the fill material to an area bordered by the barrier structure.Type: ApplicationFiled: June 28, 2018Publication date: January 2, 2020Inventors: William WARREN, Taylor GAINES, Frederick ATADANA, Edvin CETEGEN, Vipul MEHTA, Hsin-Yu LI, Yuying WEI, Yang GUO, Ren ZHANG
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Publication number: 20160343591Abstract: Embodiments of the present disclosure are directed to techniques and configurations for an integrated circuit (IC) package having an underfill layer with filler particles arranged in a generally random distribution pattern. In some embodiments, a generally random distribution pattern of filler particles may be obtained by reducing an electrostatic charge on one or more components of the IC package assembly, by applying a surface treatment to filler to reduce filler electrical charge, by applying an electric force against the filler particles of the underfill material in a direction opposite to a direction of gravitational force, by using an underfill material with a relatively low maximum filler particle size, and/or by snap curing the underfill layer at a relatively low temperature. Other embodiments may be described and/or claimed.Type: ApplicationFiled: August 1, 2016Publication date: November 24, 2016Inventors: Suriyakala Ramalingam, Manish Dubey, Hsin-Yu Li, Michelle S. Phen-Givoni, Hitesh Arora, Nisha Ananthakrishnan, Yiqun Bai, Yonghao Xiu, Rajendra C. Dias
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Patent number: 9431274Abstract: Embodiments of the present disclosure are directed to techniques and configurations for an integrated circuit (IC) package having an underfill layer with filler particles arranged in a generally random distribution pattern. In some embodiments, a generally random distribution pattern of filler particles may be obtained by reducing an electrostatic charge on one or more components of the IC package assembly, by applying a surface treatment to filler to reduce filler electrical charge, by applying an electric force against the filler particles of the underfill material in a direction opposite to a direction of gravitational force, by using an underfill material with a relatively low maximum filler particle size, and/or by snap curing the underfill layer at a relatively low temperature. Other embodiments may be described and/or claimed.Type: GrantFiled: December 20, 2012Date of Patent: August 30, 2016Assignee: Intel CorporationInventors: Suriyakala Ramalingam, Manish Dubey, Hsin-Yu Li, Michelle S. Phen, Hitesh Arora, Nisha Ananthakrishnan, Yiqun Bai, Yonghao Xiu, Rajendra C. Dias
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Publication number: 20140177149Abstract: Embodiments of the present disclosure are directed to techniques and configurations for an integrated circuit (IC) package having an underfill layer with filler particles arranged in a generally random distribution pattern. In some embodiments, a generally random distribution pattern of filler particles may be obtained by reducing an electrostatic charge on one or more components of the IC package assembly, by applying a surface treatment to filler to reduce filler electrical charge, by applying an electric force against the filler particles of the underfill material in a direction opposite to a direction of gravitational force, by using an underfill material with a relatively low maximum filler particle size, and/or by snap curing the underfill layer at a relatively low temperature. Other embodiments may be described and/or claimed.Type: ApplicationFiled: December 20, 2012Publication date: June 26, 2014Inventors: Suriyakala Ramalingam, Manish Dubey, Hsin-Yu Li, Michelle S. Phen, Hitesh Arora, Nisha Ananthakrishnan, Yiqun Bai, Yonghao Xiu, Rajendra C. Dias
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Publication number: 20140162950Abstract: The present invention provides a method for inhibiting peritoneal metastasis caused by gastric cancer cells in a subject in need thereof comprising administering to the subject a pharmaceutically effective amount of a connective tissue growth factor (CTGF), wherein the CTGF binds to an integrin ?3?1 of the gastric cancer cells. The present invention also provides a method for predicting peritoneal metastasis caused by gastric cancer cells in a subject comprising providing a peritoneal tissue from the subject; measuring a first expression amount of a connective tissue growth factor (CTGF) from the peritoneal tissue; and comparing the first expression amount to a reference expression amount of the CTGF from a non-peritoneal metastasis gastric cancer tissue.Type: ApplicationFiled: December 10, 2012Publication date: June 12, 2014Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Cheng-Chi Chang, Chiung-Nien Chen, Hsin-Yu Li, Min-Liang Kuo
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Publication number: 20030157414Abstract: A holographic recording medium showing little or no shrinkage after exposure comprises an acid generator capable of producing an acid upon exposure to actinic radiation; a binder; a difunctional epoxide monomer or oligomer; and a polyfunctional (i.e., tri- or higher functional) epoxide monomer or oligomer, the difunctional and polyfunctional epoxide monomers or oligomers being capable of undergoing cationic polymerization initiated by the acid produced from the acid generator. The medium is especially useful for holographic data storage applications.Type: ApplicationFiled: November 13, 1997Publication date: August 21, 2003Inventors: PRADEEP K. DHAL, RICHARD T. INGWALL, ERIC S. KOLB, HSIN YU LI, DAVID A. WALDMAN