Abstract: Three-dimensional (3D) semiconductor devices and fabricating methods are provided. In some implementations, a disclosed semiconductor device comprises: an array of vertical transistors each comprising a semiconductor body extending in a vertical direction; a plurality of word lines each extending along a first lateral direction and comprising a plurality of gate structures of a row of the array of vertical transistors arranged in the first lateral direction; and a plurality of bit lines each extending along a second lateral direction different from the first lateral direction and comprising silicide.

Abstract: In a method for fabricating a semiconductor device, a stack of alternating insulating layers and sacrificial layers are formed over a substrate. A staircase having a plurality of steps are formed in the stack, where each of the plurality of steps has a tread and a riser and further includes a respective pair of the insulating layer and the sacrificial layer over the insulating layer of the respective step. A dielectric layer is formed along the treads and risers of the plurality of steps. The dielectric layer is doped with one or a combination of carbon, phosphorous, boron, arsenic, and oxygen. The sacrificial layers are further replaced with a conductive material to form word line layers that are arranged between the insulating layers. A plurality of word line contacts are formed to extend from the word line layers of the plurality of steps, and further extend through the dielectric layer.