Abstract: A semiconductor device is operated for sensing incident light and includes a substrate, a device layer, a semiconductor layer and a color filter layer. The device layer is disposed on the substrate and includes light-sensing regions. The semiconductor layer overlies the device layer and has a first surface and a second surface opposite to the first surface. The first surface is adjacent to the device layer. The semiconductor layer includes microstructures on the second surface. The color filter layer is disposed on the second surface of the semiconductor layer.

Abstract: An integrated circuit structure with a back side through silicon via (B/S TSV) therein and a method of forming the same is disclosed. The method includes the steps of: receiving a wafer comprising a substrate having a front side that has a conductor thereon and a back side; forming a back side through silicon via (B/S TSV) from the back side of the substrate to penetrate the substrate; and filling the back side through silicon via (B/S TSV) with a conductive material to form an electrical connection with the conductor. Thus a back side through silicon via penetrates the back side of the substrate and electrically connects to the conductor on the front side of the substrate is formed.

Abstract: An integrated circuit structure with a back side through silicon via (B/S TSV) therein and a method of forming the same is disclosed. The method includes the steps of: receiving a wafer comprising a substrate having a front side that has a conductor thereon and a back side; forming a back side through silicon via (B/S TSV) from the back side of the substrate to penetrate the substrate; and filling the back side through silicon via (B/S TSV) with a conductive material to form an electrical connection with the conductor. Thus a back side through silicon via penetrates the back side of the substrate and electrically connects to the conductor on the front side of the substrate is formed.

Abstract: A semiconductor device includes a substrate, a semiconductor layer, light-sensing devices, a transparent dielectric layer and a grid shielding layer. The semiconductor layer overlies the substrate, and has a first surface and a second surface opposite to the first surface. The semiconductor layer includes microstructures disposed on the second surface of the semiconductor layer. The light-sensing devices are disposed on the first surface of the semiconductor layer. The transparent dielectric layer is disposed on the second surface of the semiconductor layer, and covers the microstructures. The grid shielding layer extends from the first surface of the semiconductor layer toward the second surface of the semiconductor layer, and surrounds each of the light-sensing devices to separate the light-sensing devices from each other, in which a depth of the grid shielding layer is greater than two-thirds of a thickness of the semiconductor layer.

Abstract: A method of forming an RRAM cell structure is provided. The method includes forming dummy features over a substrate, and the dummy features have a gap therebetween. The method also includes depositing an oxide layer over the dummy features while forming a first V-shaped valley on the oxide layer. The method further includes partially planarizing the oxide layer while leaving the first V-shaped valley. In addition, the method includes forming a first electrode over the oxide layer while forming a second V-shaped valley on the first electrode. The method further includes forming a resistance variable layer over the first electrode in a conformal manner. The method still includes forming a second electrode over the resistance variable layer.

Abstract: In a method for manufacturing a semiconductor device, a substrate including a gate structure is provided. A source region and a drain region are formed at opposing sides of the gate structure and an implant region for a resistor device is formed in the substrate. Pocket implant regions are formed in the source region and the drain region. A dielectric layer is formed to cover the gate structure and the substrate. A portion of dopants in the pocket implant regions interact with portions of dopants in the source region and the drain region to form lightly doped drain regions above the pocket implant regions. A resistor region of the resistor device is defined on the implant region. A portion of the dielectric layer is removed to form a spacer on a sidewall of the gate structure and a resistor protection dielectric layer on a portion of the implant region.

Abstract: A semiconductor device includes a substrate, a semiconductor layer, light-sensing devices, a transparent dielectric layer and a grid shielding layer. The semiconductor layer overlies the substrate, and has a first surface and a second surface opposite to the first surface. The semiconductor layer includes microstructures disposed on the second surface of the semiconductor layer. The light-sensing devices are disposed on the first surface of the semiconductor layer. The transparent dielectric layer is disposed on the second surface of the semiconductor layer, and covers the microstructures. The grid shielding layer extends from the first surface of the semiconductor layer toward the second surface of the semiconductor layer, and surrounds each of the light-sensing devices to separate the light-sensing devices from each other, in which a depth of the grid shielding layer is greater than two-thirds of a thickness of the semiconductor layer.

Abstract: A semiconductor device includes a substrate, a semiconductor layer, light-sensing devices, a transparent dielectric layer and a grid shielding layer. The semiconductor layer overlies the substrate, and has a first surface and a second surface opposite to the first surface. The semiconductor layer includes microstructures disposed on the second surface of the semiconductor layer. The light-sensing devices are disposed on the first surface of the semiconductor layer. The transparent dielectric layer is disposed on the second surface of the semiconductor layer, and covers the microstructures. The grid shielding layer extends from the first surface of the semiconductor layer toward the second surface of the semiconductor layer, and surrounds each of the light-sensing devices to separate the light-sensing devices from each other, in which a depth of the grid shielding layer is greater than two-thirds of a thickness of the semiconductor layer.

Abstract: A semiconductor device includes a substrate, a semiconductor layer, light-sensing devices, a transparent dielectric layer and a grid shielding layer. The semiconductor layer overlies the substrate, and has a first surface and a second surface opposite to the first surface. The semiconductor layer includes microstructures disposed on the second surface of the semiconductor layer. The light-sensing devices are disposed on the first surface of the semiconductor layer. The transparent dielectric layer is disposed on the second surface of the semiconductor layer, and covers the microstructures. The grid shielding layer extends from the first surface of the semiconductor layer toward the second surface of the semiconductor layer, and surrounds each of the light-sensing devices to separate the light-sensing devices from each other, in which a depth of the grid shielding layer is greater than two-thirds of a thickness of the semiconductor layer.

Abstract: A method of forming an RRAM cell structure is provided. The method includes forming dummy features over a substrate, and the dummy features have a gap therebetween. The method also includes depositing an oxide layer over the dummy features while forming a first V-shaped valley on the oxide layer. The method further includes partially planarizing the oxide layer while leaving the first V-shaped valley. In addition, the method includes forming a first electrode over the oxide layer while forming a second V-shaped valley on the first electrode. The method further includes forming a resistance variable layer over the first electrode in a conformal manner. The method still includes forming a second electrode over the resistance variable layer.

Abstract: A semiconductor device includes a substrate, a semiconductor layer and a switching element. The semiconductor layer is disposed on the substrate. The semiconductor layer has a light-sensing portion and includes microstructures at a side face area corresponding to the light-sensing portion. The switching element is disposed on the semiconductor layer. In the semiconductor device, the switching element and the light-sensing portion are staggered.

Abstract: Embodiments of mechanisms for forming a metal-insulator-metal (MIM) capacitor structure are provided. The metal-insulator-metal capacitor structure includes a substrate. The MIM capacitor structure also includes a CBM layer formed on the substrate, and the CBM layer includes a bottom barrier layer, a main metal layer and a top barrier layer. The MIM capacitor structure further includes a first high-k dielectric layer formed on the CBM layer, an insulating layer formed on the first high-k dielectric layer and a second high-k dielectric layer formed on the insulating layer. The MIM capacitor structure also includes a CTM layer formed on the second high-k dielectric layer, and the CBM layer includes a bottom barrier layer, a main metal layer and a top barrier layer.

Abstract: An RRAM array is provided. The RRAM array includes a plurality of horizontal electrode lines elongated in a horizontal direction. The RRAM array also includes a plurality of conducting structures elongated in a vertical direction. Each of the conducting structures includes a plurality of electrode blocks and a plurality of contact vias which are alternately arranged. The electrode blocks and the electrode lines are on the same horizontal planes. The RRAM array further includes a plurality of resistance variable elements sandwiched between the electrode lines and the electrode blocks.

Abstract: Embodiments of a resistive random access memory (RRAM) cell structure are provided. The RRAM cell structure includes a first electrode over a substrate. The RRAM cell structure also includes a resistance variable layer over the first electrode. The resistance variable layer has a first portion in a V-shape. The RRAM cell structure further includes a second electrode over the resistance variable layer.

Abstract: A semiconductor device includes a carrier wafer, a device layer, a first semiconductor layer and a second semiconductor layer. The device layer is disposed on the carrier wafer. The first semiconductor layer is disposed on the device layer, and has a first side face and a second side face opposite to the first side face, in which the first side face is adjacent to the device layer. The second semiconductor layer is disposed on the first semiconductor layer, and has a third side face and a fourth side face opposite to the third side face, in which the fourth side face of the second semiconductor layer is adjacent to the second side face of the first semiconductor layer, and the second semiconductor layer is implanted and annealed.

Abstract: A semiconductor device includes a substrate, a semiconductor layer and a switching element. The semiconductor layer is disposed on the substrate. The semiconductor layer has a light-sensing portion and includes microstructures at a side face area corresponding to the light-sensing portion. The switching element is disposed on the semiconductor layer. In the semiconductor device, the switching element and the light-sensing portion are staggered.

Abstract: In a method for manufacturing a semiconductor device, a substrate including a gate structure is provided. A source region and a drain region are formed at opposing sides of the gate structure and an implant region for a resistor device is formed in the substrate. Pocket implant regions are formed in the source region and the drain region. A dielectric layer is formed to cover the gate structure and the substrate. A portion of dopants in the pocket implant regions interact with portions of dopants in the source region and the drain region to form lightly doped drain regions above the pocket implant regions. A resistor region of the resistor device is defined on the implant region. A portion of the dielectric layer is removed to form a spacer on a sidewall of the gate structure and a resistor protection dielectric layer on a portion of the implant region.

Abstract: A semiconductor device is operated for sensing incident light and includes a substrate, a device layer, a semiconductor layer and a color filter layer. The device layer is disposed on the substrate and includes light-sensing regions. The semiconductor layer overlies the device layer and has a first surface and a second surface opposite to the first surface. The first surface is adjacent to the device layer. The semiconductor layer includes microstructures on the second surface. The color filter layer is disposed on the second surface of the semiconductor layer.

Abstract: An RRAM array is provided. The RRAM array includes a plurality of horizontal electrode lines elongated in a horizontal direction. The RRAM array also includes a plurality of conducting structures elongated in a vertical direction. Each of the conducting structures includes a plurality of electrode blocks and a plurality of contact vias which are alternately arranged. The electrode blocks and the electrode lines are on the same horizontal planes. The RRAM array further includes a plurality of resistance variable elements sandwiched between the electrode lines and the electrode blocks.

Abstract: Embodiments of a resistive random access memory (RRAM) cell structure are provided. The RRAM cell structure includes a first electrode over a substrate. The RRAM cell structure also includes a resistance variable layer over the first electrode. The resistance variable layer has a first portion in a V-shape. The RRAM cell structure further includes a second electrode over the resistance variable layer.