Abstract: A novel packaging method for attached (SMD-type) single small-size and array type chip semiconductor components is disclosed. The configuration of circuit board(s) with double-side interconnections includes reserving two or more connection endpoints on the inner and outer layers of a double-sided circuit board, and interconnecting the circuits on the inner and outer layers by hole drilling and electroplating, such that the two or more connection endpoints on the inner layer are used as inner electrodes for connecting with a semiconductor die, whereas the two or more connection endpoints on the outer layer are used as outer electrodes for SMT soldering.

Abstract: An airtight test method is provided. The method includes the following steps. First, an opening structure is provided, wherein the opening structure is formed on a building structure. A seal structure is subsequently pressed against the corresponding opening structure, wherein the opening structure and the seal structure compose a chamber. Next, a pressure supply unit is connected to the chamber. A pressure difference is subsequently generated in the chamber by the pressure supply unit. Finally, a measured flow rate between the pressure supply unit and the chamber is detected to measure the airtightness of the opening structure.