Abstract: A single layer process is utilized to reduce swing effect interference and reflection during imaging of a photoresist. An anti-reflective additive is added to a photoresist, wherein the anti-reflective additive has a dye portion and a reactive portion. Upon dispensing the reactive portion will react with underlying structures to form an anti-reflective coating between the underlying structure and a remainder of the photoresist. During imaging, the anti-reflective coating will either absorb the energy, preventing it from being reflected, or else modify the optical path of reflection, thereby helping to reduce interference caused by the reflected energy.

Abstract: A single layer process is utilized to reduce swing effect interference and reflection during imaging of a photoresist. An anti-reflective additive is added to a photoresist, wherein the anti-reflective additive has a dye portion and a reactive portion. Upon dispensing the reactive portion will react with underlying structures to form an anti -reflective coating between the underlying structure and a remainder of the photoresist. During imaging, the anti-reflective coating will either absorb the energy, preventing it from being reflected, or else modify the optical path of reflection, thereby helping to reduce interference caused by the reflected energy.

Abstract: An atomic layer deposition apparatus includes a chamber including a plurality of regions; and a heating device respectively providing specific temperature ranges for the plurality of regions. By flowing precursor gases at different flow rates in the different regions, thin films can be simultaneously formed in the different regions having different film thicknesses.

Abstract: A method includes providing a semiconductor substrate, and performing an ion implantation process to a surface of the substrate. The ion implantation process includes intermittently applying an ion beam to the surface, and while applying the ion beam, applying a heating process with a heating temperature above a threshold level.

Abstract: An atomic layer deposition apparatus includes a chamber including a plurality of regions; and a heating device respectively providing specific temperature ranges for the plurality of regions. By flowing precursor gases at different flow rates in the different regions, thin films can be simultaneously formed in the different regions having different film thicknesses.

Abstract: An atomic layer deposition apparatus includes a chamber including a plurality of regions; and a heating device respectively providing specific temperature ranges for the plurality of regions.

Abstract: A method includes providing a semiconductor substrate, and performing an ion implantation process to a surface of the substrate. The ion implantation process includes intermittently applying an ion beam to the surface, and while applying the ion beam, applying a heating process with a heating temperature above a threshold level.

Abstract: A method includes providing a semiconductor substrate, and performing an ion implantation process to a surface of the substrate. The ion implantation process includes intermittently applying an ion beam to the surface, and while applying the ion beam, applying a heating process with a heating temperature above a threshold level.

Abstract: A method includes providing a semiconductor substrate, and performing an ion implantation process to a surface of the substrate. The ion implantation process includes intermittently applying an ion beam to the surface, and while applying the ion beam, applying a heating process with a heating temperature above a threshold level.

Abstract: Embodiments of the disclosure include a shallow trench isolation (STI) structure and a method of forming the same. A trench is formed in a substrate. A silicon oxide and a silicon liner layer are formed on sidewalls and a bottom surface of the trench. A flowable silicon oxide material fills in the trench, is cured, and then is partially removed. Another silicon oxide is deposited in the trench to fill the trench. The STI structure in a fabricated device includes a bottom portion having silicon oxide and a top portion having additionally a silicon oxide liner and a silicon liner on the sidewalls.

Abstract: Embodiments of the disclosure include a shallow trench isolation (STI) structure and a method of forming the same. A trench is formed in a substrate. A silicon oxide and a silicon liner layer are formed on sidewalls and a bottom surface of the trench. A flowable silicon oxide material fills in the trench, is cured, and then is partially removed. Another silicon oxide is deposited in the trench to fill the trench. The STI structure in a fabricated device includes a bottom portion having silicon oxide and a top portion having additionally a silicon oxide liner and a silicon liner on the sidewalls.

Abstract: Embodiments of the disclosure include a shallow trench isolation (STI) structure and a method of forming the same. A trench is formed in a substrate. A silicon oxide and a silicon liner layer are formed on sidewalls and a bottom surface of the trench. A flowable silicon oxide material fills in the trench, is cured, and then is partially removed. Another silicon oxide is deposited in the trench to fill the trench. The STI structure in a fabricated device includes a bottom portion having silicon oxide and a top portion having additionally a silicon oxide liner and a silicon liner on the sidewalls.

Abstract: Embodiments of the disclosure include a shallow trench isolation (STI) structure and a method of forming the same. A trench is formed in a substrate. A silicon oxide and a silicon liner layer are formed on sidewalls and a bottom surface of the trench. A flowable silicon oxide material fills in the trench, is cured, and then is partially removed. Another silicon oxide is deposited in the trench to fill the trench. The STI structure in a fabricated device includes a bottom portion having silicon oxide and a top portion having additionally a silicon oxide liner and a silicon liner on the sidewalls.

Abstract: An atomic layer deposition apparatus includes a chamber including a plurality of regions; and a heating device respectively providing specific temperature ranges for the plurality of regions.

Abstract: A system and method are disclosed for processing semiconductors. An embodiment comprises a reaction chamber for processing wafers and having walls tapering at an angle that is greater than 0 degrees and less than about 35 degrees from a first end optionally having a diameter of 341 to 380 millimeters to a second end optionally having a diameter of 300 to 340 millimeters at a second end, with gas flow from the first end to the second end, and having at least one deposition injector near the first end of the reaction chamber and having a plurality of injector openings that disperse injection material across a cross section of the reaction chamber for forming a deposition layer.

Abstract: The present disclosure provides a method that includes forming first and second gate structures over first and second regions, respectively, removing a first dummy gate and first dummy dielectric from the first gate structure thereby forming a first trench and removing a second dummy gate and second dummy dielectric from the second gate structure thereby forming a second trench, forming a gate layer to partially fill the first and second trenches, forming a material layer to fill the remainder of the first and second trenches, removing a portion of the material layer such that a remaining portion of the material layer protects a first portion of the gate layer located at a bottom portion of the first and second trenches, removing a second portion of the gate layer, removing the remaining portion of the material layer from the first and second trenches.

Abstract: The present disclosure provides a method that includes forming first and second gate structures over first and second regions, respectively, removing a first dummy gate and first dummy dielectric from the first gate structure thereby forming a first trench and removing a second dummy gate and second dummy dielectric from the second gate structure thereby forming a second trench, forming a gate layer to partially fill the first and second trenches, forming a material layer to fill the remainder of the first and second trenches, removing a portion of the material layer such that a remaining portion of the material layer protects a first portion of the gate layer located at a bottom portion of the first and second trenches, removing a second portion of the gate layer, removing the remaining portion of the material layer from the first and second trenches.

Abstract: A truncated dummy plate which is suitable for promoting substantially uniform flow of process gases among all regions on the surface of a substrate to facilitate deposition of a film having uniform thickness on the substrate. The truncated dummy plate has a circular shape with a flat edge provided in the curved edge of the dummy plate. At least two, and preferably, about three or four of the dummy plates are positioned in the sites on a wafer boat which are in relatively close proximity to a gas outlet in a process furnace typically during a LPCVD process carried out in the furnace. The flat or truncated edges of the dummy plates are disposed on the gas inlet side of the process chamber, with the round edges of the dummy plates disposed on the gas outlet side of the process chamber.

Abstract: A truncated dummy plate which is suitable for promoting substantially uniform flow of process gases among all regions on the surface of a substrate to facilitate deposition of a film having uniform thickness on the substrate. The truncated dummy plate has a circular shape with a flat edge provided in the curved edge of the dummy plate. At least two, and preferably, about three or four of the dummy plates are positioned in the sites on a wafer boat which are in relatively close proximity to a gas outlet in a process furnace typically during a LPCVD process carried out in the furnace. The flat or truncated edges of the dummy plates are disposed on the gas inlet side of the process chamber, with the round edges of the dummy plates disposed on the gas outlet side of the process chamber.

Abstract: A truncated dummy plate which is suitable for promoting substantially uniform flow of process gases among all regions on the surface of a substrate to facilitate deposition of a film having uniform thickness on the substrate. The truncated dummy plate has a circular shape with a flat edge provided in the curved edge of the dummy plate. At least two, and preferably, about three or four of the dummy plates are positioned in the sites on a wafer boat which are in relatively close proximity to a gas outlet in a process furnace typically during a LPCVD process carried out in the furnace. The flat or truncated edges of the dummy plates are disposed on the gas inlet side of the process chamber, with the round edges of the dummy plates disposed on the gas outlet side of the process chamber.