Patents by Inventor Hsing-Wen Chang

Hsing-Wen Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200308223
    Abstract: Disclosed herein are composite polypeptide. According to various embodiments, the composite polypeptide includes a parent polypeptide and a metal binding motif capable of forming a complex with a metal cation. The composite polypeptide may be conjugated with a linker unit having a plurality of functional elements to form a multi-functional molecular construct. Alternatively, multiple composite polypeptides may be conjugated to a linker unit to form a molecular construct, or a polypeptide bundle. Linker units suitable for conjugating with the composite polypeptide having the metal binding motif are also disclosed.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 1, 2020
    Applicant: Immunwork Inc.
    Inventors: Tse-Wen CHANG, Hsing-Mao CHU, Wei-Ting TIAN, Yueh-Hsiang YU
  • Patent number: 10770144
    Abstract: A non-volatile memory and a program method thereof are provided. The program method includes: setting one of a plurality of word lines to be a program word line, setting the word lines except the program word line to be a plurality of unselected word lines; raise a voltage on the program word line from a reference voltage to a first program voltage during a first sub-time period of a program time period; raising the voltage on the program word line from the first program voltage to a second program voltage during a second sub-time period of the program time period; and raising voltages on at least part of the unselected word lines from the reference voltage to a pass voltage during the second sub-time period.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 8, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hsing-Wen Chang, Yao-Wen Chang
  • Publication number: 20200265896
    Abstract: A non-volatile memory and a program method thereof are provided. The program method includes: setting one of a plurality of word lines to be a program word line, setting the word lines except the program word line to be a plurality of unselected word lines; raise a voltage on the program word line from a reference voltage to a first program voltage during a first sub-time period of a program time period; raising the voltage on the program word line from the first program voltage to a second program voltage during a second sub-time period of the program time period; and raising voltages on at least part of the unselected word lines from the reference voltage to a pass voltage during the second sub-time period.
    Type: Application
    Filed: February 15, 2019
    Publication date: August 20, 2020
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Hsing-Wen Chang, Yao-Wen Chang
  • Patent number: 10741250
    Abstract: A non-volatile memory device driving method, applicable to a non-volatile memory device comprising a row decoder and a memory array, comprises: utilizing the row decoder to transmit multiple word line signals to multiple word lines of the memory array; according to an address, utilizing the row decoder to switch a selected word line signal of the multiple word line signals from a predetermined voltage level to a program voltage level; utilizing the row decoder to switch at least one support word line signal of the multiple word line signals from the predetermined voltage level to a first pass voltage level; when the selected word line signal is remained at the program voltage level, utilizing the row decoder to switch the at least one support word line signal from the first pass voltage level to a higher second pass voltage level.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: August 11, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hsing-Wen Chang, Yao-Wen Chang, Chi-Yuan Chin
  • Publication number: 20200243121
    Abstract: A non-volatile memory and a program method thereof are provided. The program method includes: selecting a programmed word line, where the programmed word line has a plurality of segments respectively corresponding to a plurality of bit lines; providing a program voltage to a voltage receiving end of the programmed word line, and sequentially transmitting the program voltage to the segments; respectively providing a plurality of bit line voltages to the bit lines at a plurality of enable time points and turning on a string selection switch at a setting time point; and setting voltage values of the bit line voltages according to the segments corresponding to the bit lines, respectively, or setting the enable time points according to the segments corresponding to the bit lines, or setting the setting time point according to a voltage transmission delay of the programmed word line.
    Type: Application
    Filed: January 30, 2019
    Publication date: July 30, 2020
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Chu-Yung Liu, Hsing-Wen Chang, Yung-Hsiang Chen, Yao-Wen Chang
  • Publication number: 20200222498
    Abstract: The present disclosure provides various molecular constructs having a plurality of fatty acids and a functional element. Methods for treating various diseases using such molecular constructs are also disclosed.
    Type: Application
    Filed: March 19, 2020
    Publication date: July 16, 2020
    Applicant: Immunwork Inc.
    Inventors: Tse-Wen CHANG, Hsing-Mao CHU, Chien-Jen LIN
  • Patent number: 10668165
    Abstract: The present disclosure provides various molecular constructs having a targeting element and an effector element. Methods for treating various diseases using such molecular constructs are also disclosed.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: June 2, 2020
    Assignee: IMMUNWORK INC.
    Inventors: Tse-Wen Chang, Chien-Jen Lin, Hsing-Mao Chu
  • Publication number: 20200157519
    Abstract: The present disclosure provides a polypeptide including an anti-fibrin antibody and a serine protease moiety of human tissue plasminogen activator. Methods for treating thrombosis in a subject in need of such treatment using such polypeptide are also disclosed.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 21, 2020
    Applicant: Immunwork Inc.
    Inventors: Tse-Wen CHANG, Hsing-Mao CHU, Wei-Ting TIAN, Ting-Wei CHANG, Ming-Yu HSIEH
  • Patent number: 10497773
    Abstract: The present disclosure relates to a method of forming a MIM (metal-insulator-metal) capacitor using a post capacitor bottom metal (CBM) treatment process to reduce a roughness of a top surface of a capacitor bottom metal layer, and an associated apparatus. In some embodiments, the method is performed by forming a capacitor bottom metal layer having a first metal material over a semiconductor substrate. A top surface of the capacitor bottom metal layer is exposed to one or more post CBM treatment agents having oxygen. The one or more post CBM treatment agents reduce a roughness of the top surface and form an interface layer having the first metal material and oxygen onto and in direct contact with the top surface of the capacitor bottom metal layer. A capacitor dielectric layer is formed over the interface layer and a capacitor top metal layer is formed over the capacitor dielectric layer.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: December 3, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yao-Wen Chang, Hsing-Lien Lin, Cheng-Yuan Tsai, Chia-Shiung Tsai
  • Patent number: 10442861
    Abstract: The present disclosure provides various molecular constructs having a targeting element and an effector element. Methods for treating various diseases using such molecular constructs are also disclosed.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: October 15, 2019
    Assignee: IMMUNWORK INC.
    Inventors: Tse-Wen Chang, Hsing-Mao Chu
  • Patent number: 10383947
    Abstract: The present disclosure provides various molecular constructs having a targeting element and an effector element. Methods for treating various diseases using such molecular constructs are also disclosed.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: August 20, 2019
    Assignee: Immunwork Inc.
    Inventors: Tse-Wen Chang, Hsing-Mao Chu
  • Patent number: 10300104
    Abstract: The present disclosure provides various molecular constructs having a targeting element and an effector element. Methods for treating various diseases using such molecular constructs are also disclosed.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: May 28, 2019
    Assignee: IMMUNWORK INC.
    Inventors: Tse-Wen Chang, Hsing-Mao Chu, Chun-Yu Lin, Wei-Ting Tian
  • Patent number: 10293018
    Abstract: The present disclosure provides various molecular constructs having a targeting element and an effector element. Methods for treating various diseases using such molecular constructs are also disclosed.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: May 21, 2019
    Assignee: IMMUNWORK INC.
    Inventors: Tse-Wen Chang, Hsing-Mao Chu, Li-Yun Du
  • Patent number: 9437303
    Abstract: A programming method of a memory array is provided and includes following steps, wherein the memory array includes a target memory cell and two periphery memory cells electrically connected to a first word line. After a first programming operation is performed on the target memory cell, the target memory cell and the two periphery memory cells are verified to obtain a first verification result. Whether to perform a second programming operation or a third programming operation on the target memory cell is determined according to the first verification result. The step of performing the second programming operation or the third programming operation on the target memory cell includes: turning off a first transistor and a second transistor; and increasing a level of a passing voltage for turning on a plurality of non-target memory cells and a level of a programming voltage transmitted by the first word line.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: September 6, 2016
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Chu-Yung Liu, Hsing-Wen Chang, Yao-Wen Chang, Tao-Cheng Lu
  • Patent number: 8929134
    Abstract: A method of programming a NAND flash memory cell string. The method includes a pre-boost stage configured to elevate channel voltage of a selected memory cell, and a boost stage is introduced after the pre-boost stage. The pre-boost stage has at least the following steps of biasing a bit line to a first voltage, biasing a string select transistor to a second voltage; and ramping down the string select transistor to the first voltage. In particular, the second voltage is higher than the first voltage.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: January 6, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Chu Yung Liu, Hsing Wen Chang, Yao Wen Chang, Tao Cheng Lu
  • Publication number: 20140254280
    Abstract: A method for programming memory cells includes applying a programming voltage to a selected memory cell in a memory cell array and a neighboring passing voltage to a neighboring memory cell next to the selected memory cell, increasing the programming voltage for programming the selected memory cell, and increasing the neighboring passing voltage for programming the selected memory cell.
    Type: Application
    Filed: May 22, 2013
    Publication date: September 11, 2014
    Applicant: Macronix International Co., Ltd.
    Inventors: Hsing Wen Chang, Yao Wen Chang, Yuan-Peng Chao
  • Publication number: 20140226411
    Abstract: A method of programming a NAND flash memory cell string. The method includes a pre-boost stage configured to elevate channel voltage of a selected memory cell, and a boost stage is introduced after the pre-boost stage. The pre-boost stage has at least the following steps of biasing a bit line to a first voltage, biasing a string select transistor to a second voltage; and ramping down the string select transistor to the first voltage. In particular, the second voltage is higher than the first voltage.
    Type: Application
    Filed: February 8, 2013
    Publication date: August 14, 2014
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: CHU YUNG LIU, HSING WEN CHANG, YAO WEN CHANG, TAO CHENG LU
  • Publication number: 20140126296
    Abstract: A flash memory device including a memory array, a row decoder and M page buffers is provided, wherein M is an integer greater than 2. The memory array includes a plurality of memory cells and is connected to a plurality of word lines and a plurality of bit lines. The row decoder drives a specific word line among the word lines during an enabling period. Each of the page buffers is connected to N bit lines of the bit lines, and N is an integer equal to or greater than 3. A jth page buffer drives an (N*(j?1)+1)th bit line to an (N*j)th bit line during the enabling period, and one of an (i?1)th bit line and an (i+1)th bit line is not driven when an ith bit line is not driven, wherein j is an integer and 1?j?M, and i is an integer and 1<i<M*N.
    Type: Application
    Filed: January 9, 2014
    Publication date: May 8, 2014
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Hsing-Wen Chang, Yao-Wen Chang, Chu-Yung Liu
  • Patent number: 8644081
    Abstract: A flash memory device including a memory array, a row decoder and M page buffers is provided, wherein M is a positive integer. The memory array includes a plurality of memory cells and is electrically connected to a plurality of word lines and a plurality of bit lines. The row decoder drives a specific word line among the word lines during an enabling period. The M page buffers divide the enabling period into N sub-periods, wherein N is an integer greater than 2. Furthermore, the ith, (i+N)th, (i+2N)th, . . . , (i+(M?1)*N)th bit lines are driven by the M page buffers during the ith sub-period, so as to program the memory cells electrically connected to the specific word line, wherein i is an integer and 1?i?N.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: February 4, 2014
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Hsing-Wen Chang, Yao-Wen Chang, Chu-Yung Liu
  • Patent number: 8605507
    Abstract: A charge storage memory is configured in a NAND array, and includes NAND strings coupled to bit lines via string select switches and includes word lines. A controller is configured to produce a program bias pulse by biasing the bit lines and string select lines in a first condition; setting a word line coupled to a target cell to a first voltage level while the bit lines and string select lines are in the first condition; thereafter, biasing the bit lines and string select lines in a second condition; and setting the word line coupled to the target cell to a second voltage level higher than the first voltage level while the bit lines and string select lines are in the second condition. Program bias pulses produced in this manner can be used in a modulated incremental stepped pulse programming sequence.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: December 10, 2013
    Assignee: Macronix International Co., Ltd.
    Inventors: Chuyung Liu, Hsing-Wen Chang, Yaowen Chang, Tao-Cheng Lu