Abstract: Disclosed is a stress-resistant trace structure and a piezoelectric detection device made thereof. The stress-resistant trace structure includes a patterned trace layer and a porous anti-stress layer. The patterned trace layer has a non-linear pattern and is configured on the porous anti-stress layer. Specifically, the porous anti-stress layer has a plurality of through holes, and the through holes are vertically interlaced with the non-linear pattern.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The semiconductor structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first oxide layer formed below the a first substrate, a first bonding layer formed below the first oxide layer, and a first bonding via formed through the first bonding layer and the first oxide layer. The second semiconductor device includes a second oxide layer formed over a second substrate, a second bonding layer formed over the second oxide layer, and a second bonding via formed through the second bonding layer and the second oxide layer. The semiconductor structure also includes a bonding structure between the first substrate and the second substrate, and the bonding structure includes the first bonding via bonded to the second bonding via.

Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.

Abstract: A semiconductor device includes a substrate, two source/drain features over the substrate, channel layers connecting the two source/drain features, and a gate structure wrapping around each of the channel layers. Each of the two source/drain features include a first epitaxial layer, a second epitaxial layer over the first epitaxial layer, and a third epitaxial layer on inner surfaces of the second epitaxial layer. The channel layers directly interface with the second epitaxial layers and are separated from the third epitaxial layers by the second epitaxial layers. The first epitaxial layers include a first semiconductor material with a first dopant. The second epitaxial layers include the first semiconductor material with a second dopant. The second dopant has a higher mobility than the first dopant.

Abstract: A decoration panel includes a first substrate, a first transparent conductive element, a transparent structure, a second substrate, a second transparent conductive element, and a first cholesteric liquid crystal layer. The first transparent conductive element is disposed on the first substrate. The transparent structure is disposed on the first substrate. The second substrate is disposed opposite to the first substrate. The second transparent conductive element is disposed on the second substrate. The first cholesteric liquid crystal layer is disposed between the first transparent conductive element and the second transparent conductive element. A display apparatus is adapted to render a decoration pattern, and the decoration pattern corresponds to the transparent structure. Moreover, a display apparatus including the decoration panel is also provided.

Abstract: The disclosure provides a time-lapse photographic device. The time-lapse photographic device includes a camera module, a drive module, an environment detection module, and a control unit. The drive module is connected to the camera module to drive the camera module to rotate. The environment detection module is configured to detect an external environment of the time-lapse photographic device to generate an environment detection signal. The control unit is electrically connected to the camera module, the drive module, and the environment detection module. The control unit generates, according to a shooting stop parameter, a plurality of intermittent drive signals to control the drive module, and controls the camera module to shoot at intervals of the drive signals. The control unit adjusts operation of at least one of the camera module and the drive module according to the environment detection signal.

Abstract: A light guide plate including a light emitting surface, a bottom surface, a light incident surface, multiple protrusion structures, and multiple grooves is provided. The light incident surface is connected between the light emitting surface and the bottom surface. The protrusion structures are disposed along a first direction and extend toward a second direction. The protrusion structures have a light condensing angle along the first direction, and the light condensing angle ranges from 10 degrees to 40 degrees. The grooves are disposed in the protrusion structures of the light guide plate. The grooves extend toward the first direction. The protrusion structures have a light receiving surface that defines each groove and is closer to the light incident surface. An angle between the light receiving surface and the bottom surface ranges from 35 degrees to 65 degrees. A display apparatus adopting the light guide plate is also provided.

Abstract: A capacitor on a fin structure includes a fin structure. A dielectric layer covers the fin structure. A first electrode extension is embedded within the fin structure. A first electrode penetrates the dielectric layer and contacts the first electrode extension. A second electrode and a capacitor dielectric layer are disposed within the dielectric layer. The capacitor dielectric layer surrounds the second electrode, and the capacitor dielectric layer is between the second electrode and the first electrode extension.

Abstract: A display device including a substrate, a cholesteric liquid crystal layer, and a transparent electrode layer that are sequentially stacked is provided. The cholesteric liquid crystal layer includes cholesteric liquid crystal molecules and a plurality of transparent photoresist structures. Each of the transparent photoresist structures is a closed structure, and the cholesteric liquid crystal molecules are respectively accommodated in a plurality of patterned areas respectively surrounded by the transparent photoresist structures, so as to form a plurality of cholesteric liquid crystal patterns. The transparent electrode layer includes a plurality of sub-electrodes. The cholesteric liquid crystal patterns are respectively driven by the sub-electrodes. An orthogonal projection of each of the transparent photoresist structures on the substrate falls in an orthogonal projection of a corresponding sub-electrode of the sub-electrodes on the substrate.

Abstract: A method involves measuring, for an optical property of the display panel for an input gray level and at a first refresh rate, first and second values at respective first and second ambient brightness levels. The method also involves determining a compensation factor for the input gray level at the first refresh rate. The method further involves determining a modified gamma value at a second refresh rate, wherein the modified gamma value reduces a perceived optical defect of the display panel when operating at the second refresh rate by maintaining a consistent delta difference in values for the optical property between the first and second refresh rates at different ambient brightness levels. The method additionally involves storing the modified gamma value, where the device is configured to adjust input display data using the modified gamma value when transitioning from the first refresh rate to the second refresh rate.

Abstract: The present disclosure discloses a method for recycling all types of lithium batteries. First, the lithium battery waste is acid-leached to obtain a solution containing most of metal ions. After filtering, the solution is separated from the remaining solids, and then the obtained solution is subjected to separate precipitation many times. After separately adjusting the pH value of the solution many times, adding precipitants with a high selectivity ratio, and matching with filtration and separation reaction, all ions in the lithium battery waste are sequentially precipitated in forms of iron phosphate (FePO4), aluminum hydroxide (Al(OH)3), manganese oxide (MnO2), dicobalt trioxide (cobalt oxide, Co2O3), nickel hydroxide (Ni(OH)2), and lithium carbonate (Li2CO3).

Abstract: An imaging system lens assembly includes a first lens group and a second lens group. The first lens group includes a first catadioptric lens element and a second catadioptric lens element, the second lens group includes at least one lens element. Each of an object-side surface and an image-side surface of the first catadioptric lens element and the second catadioptric lens element includes a central region and a peripheral region. The peripheral region of the object-side surface of the first catadioptric lens element includes a first refracting surface. The peripheral region of the image-side surface of the second catadioptric lens element includes a first reflecting surface. The central region of the object-side surface of the first catadioptric lens element includes a second reflecting surface. The central region of the image-side surface of the second catadioptric lens element includes a last refracting surface.

Abstract: A resonant flyback power converter includes: a first and a second transistors which form a half-bridge circuit for switching a transformer and a resonant capacitor to generate an output voltage; a current-sense device for sensing a switching current of the half-bridge circuit to generate a current-sense signal; and a switching control circuit generating a first and a second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal controls the half-bridge circuit to generate a positive current to magnetize the transformer and charge the resonant capacitor. The turn-on of the second driving signal controls the half-bridge circuit to generate a negative current to discharge the resonant capacitor. The switching control circuit turns off the first transistor when the positive current exceeds a positive-over-current threshold, and/or, turns off the second transistor when the negative current exceeds a negative-over-current threshold.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.

Abstract: One implementation described herein is related to a device having memory with sense amplifiers and precharge blocks arranged in an array with a first side and a second side. The first side has first sense amplifiers and first precharge blocks coupled together with first bitlines, and the second side has second sense amplifiers and second precharge blocks coupled together with second bitlines. The device has a first delay block coupled to the first precharge blocks in the first side of the array, and the first delay block delays precharge of the first bitlines with a first precharge burst in a multi-burst precharge event. The device has a second delay block coupled to the second precharge blocks in the second side of the array, and the second delay block delays precharge of the second bitlines with a second precharge burst in the multi-burst precharge event.

Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.

Abstract: Systems and methods are provided for fail-safe protection of circuitry from electrostatic discharge due through input and output connections. The power circuitry may include a string of diodes, connections to power lines, and particular diodes for voltage pull-up and pull-down clamping. There may be both a pull-up third diode in the diode string for connection between I/O and VDD and a pull-down third diode between I/O and VSS. During an ESD event the ESD device is configured to hold voltage from exceeding a threshold voltage and damaging internal circuitry. During operational mode the ESD device is turned off and does not interfere with circuit operations.

Abstract: A method for calibrating input display data for multiple display refresh rates comprises measuring (1210) an optical property of a display panel for an input gray level at a first refresh rate, measuring (1220) the optical property for a plurality of candidate gray levels at a second refresh rate, selecting (1230), based on the measured optical properties of the display panel, a corresponding gray level for the input gray level, wherein the corresponding gray level is selected from the plurality of candidate gray levels and storing (1240), at the device, the corresponding gray level for the input gray level, wherein subsequent to the storing, the device is configured to adjust input display data using the corresponding gray level for the input gray level when the display panel is transitioning from the first refresh rate to the second refresh rate.

Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.

Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.