Patents by Inventor HSIU-AN LIN

HSIU-AN LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250143046
    Abstract: A light emitting diode package structure includes one or more lead frame units, a light emitting element, and an encapsulation unit that completely covers the light emitting element and partially covers the lead frame units. Each lead frame unit includes a chip-mounted portion, a first electrode portion, and a second electrode portion. The first and the second electrode portion extend along a first direction, and are disposed on two sides of the chip-mounted portion. Each lead frame unit further includes multiple first connecting portions extending from the chip-mounted portion along the first direction, and multiple second connecting portions formed by extension of the first and the second electrode portion along a second direction. The light emitting element is fixed to the chip-mounted portion and electrically connected to the electrode portions. A lead frame that includes the at least one lead frame unit is also provided.
    Type: Application
    Filed: October 25, 2024
    Publication date: May 1, 2025
    Inventors: HSIN-HUI LIANG, CHENG-HONG SU, CHEN-HSIU LIN, CHIH-LI YU, CHENG-HAN WANG, SHENG-YUN WANG
  • Publication number: 20250004256
    Abstract: A fixed-focus imaging lens includes a first lens group, an aperture stop and a second lens group arranged in order from an object side to an image side of the fixed-focus imaging lens. A focal plane for visible light with a wavelength of 550 nm along an optical axis of the imaging lens is less than 0.01 mm. The fixed-focus imaging lens satisfies a condition of 45<LT/GD, where LT is a distance measured along the optical axis between two outermost lens surfaces with refractive powers at opposite ends of the imaging lens, and GD is a distance measured along the optical axis between the first lens group and the second lens group.
    Type: Application
    Filed: May 14, 2024
    Publication date: January 2, 2025
    Inventor: YING-HSIU LIN
  • Patent number: 12183724
    Abstract: A multiple pixel package structure with a buried chip and an electronic device using the same are provided. The multiple pixel package structure includes a multi-layered circuit board, a plurality of pixels, a protective layer, and a control chip. The pixels are arranged on the multi-layered circuit board and into an array. Each of the pixels includes a plurality of light emitting elements of different colors. The protective layer is formed on the multi-layered circuit board and covers the pixels. The control chip is buried in the multi-layered circuit board and electrically connected to the light emitting elements of each of the pixels, so as to allow each of the pixels to produce a target luminous characteristic.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: December 31, 2024
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chen-Hsiu Lin, Tsung-Kang Ying, Erh-Chan Hsu
  • Publication number: 20240377244
    Abstract: An optical sensing module includes a substrate, an optical sensing device, and a plurality of solders. The substrate has an upper surface, and the upper surface has a plurality of first soldering pads. The optical sensing device is disposed upright on the substrate. The optical sensing device includes a transposition plate and an optical sensing package. The transposition plate includes a first surface, a second surface, and a third surface. The first surface has a plurality of second soldering pads, the second surface has a plurality of conductive through holes, and the third surface has a plurality of metal ribs. The conductive through holes are electrically connected to the second soldering pads and the metal ribs. The optical sensing package is disposed on the first surface and electrically connected to the second soldering pads. The plurality of solders climb onto the plurality of metal ribs, respectively.
    Type: Application
    Filed: March 27, 2024
    Publication date: November 14, 2024
    Inventors: CHEN-HSIU LIN, Yu-Chou Lin
  • Publication number: 20240345373
    Abstract: An imaging lens includes a first lens group and a second lens group. The first lens group includes three lenses with refractive powers, where two of three lenses of the first lens group are aspheric lenses. The second lens group includes three lenses with refractive powers, where one of three lenses is an aspheric lens and other two lenses are paired to form a doublet lens. The imaging lens satisfies conditions of 3.0<LT/IMH<3.5 and 1.0<D1/LT<1.08, where IMH is a semi-diagonal image height of the imaging lens, D1 is a lens diameter of a lens closest to an object side of the imaging lens, and LT is a distance measured along an optical axis between two outermost lens surfaces with refractive powers at opposite ends of the imaging lens.
    Type: Application
    Filed: February 8, 2024
    Publication date: October 17, 2024
    Inventors: YING-HSIU LIN, CHIA-CHEN KUNG, CHING-LUNG LAI
  • Publication number: 20240347666
    Abstract: An optoelectronic device includes a substrate, a sensing element, a light emitting element, a first dam, and a second dam. The sensing element and the light emitting element are disposed on the substrate. The first dam is disposed on the substrate and covers a side of the sensing element. The second dam is disposed on the first dam. The first dam and the second dam are located between the sensing element and the light emitting element.
    Type: Application
    Filed: April 12, 2024
    Publication date: October 17, 2024
    Inventors: CHEN-HSIU LIN, Kai-Chieh Liang
  • Publication number: 20240345284
    Abstract: The photoelectric sensor includes a housing, a light-emitting module, a light-receiving module, and two adhesive members. The housing includes a first upright portion, a second upright portion, and a base. The first upright portion and the second upright portion are connected to the base, the first upright portion has a first concave structure and a first opening, and the second upright portion has a second concave structure and a second opening. The light-emitting module includes a first circuit board and a light-emitting element and is embedded in the first concave structure. The light-emitting element corresponds to the first opening. The light-receiving module includes a second circuit board and a light-receiving element and is embedded in the second concave structure. The light-receiving element corresponds to the second opening. The two adhesive members are respectively provided on side walls of the first concave structure and the second concave structure.
    Type: Application
    Filed: March 11, 2024
    Publication date: October 17, 2024
    Inventors: SHENG-YUN WANG, CHEN-HSIU LIN, BO-JHIH CHEN
  • Publication number: 20240347486
    Abstract: An integrated circuit (IC) flip-chip and a light-emitting device are provided. The IC flip-chip includes a chip body, a plurality of metal pads, and a plurality of flip-chip pads. The chip body has a surface. The metal pads are disposed on the surface of the chip body. The flip-chip pads are disposed on the metal pads, and the flip-chip pads are electrically coupled to the metal pads through a redistribution layer therebetween. A distribution of the flip-chip pads is more even than a distribution of the metal pads.
    Type: Application
    Filed: May 29, 2024
    Publication date: October 17, 2024
    Inventors: CHEN-HSIU LIN, MIN-HSI CHEN, CHANG-HUNG HSIEH, SHAN-HUI CHEN, YU-HSUAN CHU
  • Publication number: 20240304578
    Abstract: An electronic device includes a substrate, output pads, input pads, auxiliary pads, a driving chip, edge pad groups, first connection lines, a first electronic component, and signal lines. The input pads and the auxiliary pads are closer to an edge of the substrate than the output pads. The edge pad groups are located between the driving chip and the edge of the substrate. Each of the edge pad groups includes a first pad and a second pad. Each of the first connection lines is electrically connected to one of the auxiliary pads and one of first pads of the edge pad groups. The first electronic component has conductive portions. The first pad and the second pad of each of the edge pad groups are electrically connected to one of the conductive portions. The signal lines are electrically connected to the output pads and second pads of the edge pad groups.
    Type: Application
    Filed: August 8, 2023
    Publication date: September 12, 2024
    Applicant: Auo Corporation
    Inventors: Woei-Chyuan Yang, Hsiu Lin Chan, Chia Yen Lin
  • Publication number: 20240247773
    Abstract: A package structure includes a carrier, a frame, and at least one photonic device. The carrier includes a substrate and a plurality of first metal pads and second metal pads. The substrate includes a first surface and a second surface that are opposite to each other. The first metal pads are disposed on the first surface. The second metal pads are disposed on the second surface. A thickness of each of the second metal pads is greater than that of each of the first metal pads. The frame is disposed on the carrier, and an accommodating space is formed between the frame and the carrier. The at least one photonic device is disposed in the accommodating space.
    Type: Application
    Filed: April 8, 2024
    Publication date: July 25, 2024
    Inventors: CHEN-HSIU LIN, CHENG-YING LEE, MING-SUNG TSAI
  • Publication number: 20240213097
    Abstract: A device includes a semiconductor fin, a gate structure, gate spacers, and a dielectric feature. The semiconductor fin is over a substrate. The gate structure is over the semiconductor fin and includes a gate dielectric layer over the semiconductor fin and a gate metal covering the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The dielectric feature is over the substrate. The dielectric feature is in contact with the gate metal, the gate dielectric layer, and the gate spacers, and an interface between the gate metal and the dielectric feature is substantially aligned with an interface between the dielectric feature and one of the gate spacers.
    Type: Application
    Filed: February 6, 2024
    Publication date: June 27, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chang-Yun CHANG, Bone-Fong WU, Ming-Chang WEN, Ya-Hsiu LIN
  • Publication number: 20240212212
    Abstract: A method and an apparatus for waste liquid recycling with optical inspection are provided. The method includes: establishing a plurality of statistical criteria; capturing an image of a waste liquid in a transparent pipeline; performing image processing on the image of the waste liquid to obtain a plurality of characteristic data about a color characteristic; performing statistical calculation processing on the plurality of characteristic data to obtain a plurality of statistical characteristic values; and selecting at least one statistical criterion from the plurality of statistical criteria to compare with the statistical characteristic values so as to determine the quality of the waste liquid.
    Type: Application
    Filed: December 23, 2022
    Publication date: June 27, 2024
    Inventor: HSIU-AN LIN
  • Publication number: 20240210326
    Abstract: A method and an apparatus for waste liquid recycling with optical inspection are provided. The method includes: establishing a plurality of statistical criteria; capturing an image of a waste liquid in a transparent pipeline; performing image processing on the image of the waste liquid to obtain a plurality of characteristic data about a color characteristic; performing statistical calculation processing on the plurality of characteristic data to obtain a plurality of statistical characteristic values; and selecting at least one statistical criterion from the plurality of statistical criteria to compare with the statistical characteristic values so as to determine the quality of the waste liquid.
    Type: Application
    Filed: December 12, 2023
    Publication date: June 27, 2024
    Inventor: HSIU-AN LIN
  • Publication number: 20240194317
    Abstract: A method and an apparatus related to medication list management are provided. The medication association between one or more diagnoses and one or more corresponding medications recorded in a medical record is determined through an evaluating model. The evaluating model is trained through a machine learning algorithm. Multiple medication categories are integrated into the medical record based on the medication association. The medication includes one or both of a first medication and a second medication. The medication categories include an explained category related to the first medication with higher medication association and an unexplained category related to the second medication with lower medication association. A medication list interface presenting the medical record with multiple medication categories is provided. Accordingly, the medication history would be structured, grouped, and visual-encoded, so as to provide an intuitive medication list.
    Type: Application
    Filed: November 25, 2021
    Publication date: June 13, 2024
    Applicant: AESOP Technology Inc.
    Inventors: An Jim Long, Yu-Chuan Li, Yi Hsiu Lin
  • Patent number: 12009459
    Abstract: A light-emitting device, a light-emitting assembly and an integrated circuit (IC) flip-chip are provided. The light-emitting device includes the IC flip-chip, a plurality of light-emitting diode (LED) flip-chips and a substrate. The IC flip-chip includes a plurality of flip-chip pads. The LED flip-chips are spaced apart from the IC flip-chip. The substrate carries the IC flip-chip and the LED flip-chips. The LED flip-chips have a plurality of electrodes, and the flip-chip pads of the IC flip-chip and the electrodes of the LED flip-chips are disposed on the substrate by way of soldering. The LED flip-chips are electrically coupled to the IC flip-chip through the substrate.
    Type: Grant
    Filed: August 1, 2021
    Date of Patent: June 11, 2024
    Assignee: LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chen-Hsiu Lin, Min-Hsi Chen
  • Patent number: 11959606
    Abstract: A package structure including a carrier, a photonic device, a supporting frame, and an encapsulant is provided. The photonic device is disposed on the carrier. The supporting frame is disposed on the carrier and surrounds the photonic device. The encapsulant covers the supporting frame and surrounds the photonic device.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: April 16, 2024
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chen-Hsiu Lin, Cheng-Ying Lee, Ming-Sung Tsai
  • Patent number: 11933945
    Abstract: An optical lens includes a first lens group and a second lens group. The first lens group has at least two lenses that include at least one aspheric lens, the second lens group has at least four lenses that includes at least one aspheric lens, and a total number of lenses with refractive powers in the optical lens is smaller than nine. The first and the second lens groups include a first lens, a second lens, a third lens, a fourth lens, a fifth lens and a sixth lens in order from the magnified side to the minified side. The first lens to the sixth lens have respective refractive powers of negative, negative, positive, positive, negative and positive.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: March 19, 2024
    Assignee: RAYS OPTICS INC.
    Inventors: Ching-Lung Lai, Ying-Hsiu Lin, Chen-Cheng Lee
  • Patent number: 11901237
    Abstract: A device includes a semiconductor fin, a gate structure, gate spacers, and a dielectric feature. The semiconductor fin is over a substrate. The gate structure is over the semiconductor fin and includes a gate dielectric layer over the semiconductor fin and a gate metal covering the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The dielectric feature is over the substrate. The dielectric feature is in contact with the gate metal, the gate dielectric layer, and the gate spacers, and an interface between the gate metal and the dielectric feature is substantially aligned with an interface between the dielectric feature and one of the gate spacers.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chang-Yun Chang, Bone-Fong Wu, Ming-Chang Wen, Ya-Hsiu Lin
  • Patent number: 11889434
    Abstract: A wireless communication includes a control circuit and a receiver (RX) circuit. The control circuit obtains indicator information from another wireless communication system, identifies a transmitter (TX) and receiver (RX) packet delivery scenario as one of a packet overlapping scenario and a packet non-overlapping scenario according to the indicator information, and generates RX gain control information in response to the TX and RX packet delivery scenario. The RX circuit refers to the RX gain control information to set an RX gain used for receiving data.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: January 30, 2024
    Assignee: MEDIATEK INC.
    Inventors: Yen-Wen Yang, Chen-Feng Liu, Ting-Che Tseng, Ying-Che Hung, Tsai-Yuan Hsu, You-Chin Chang, Kin-Man Sun, Chih-Hsiu Lin, Teng-Wei Huang, Hung-Chang Tsai
  • Patent number: 11863449
    Abstract: A communication device which is configured to receive a data flow includes a monitor port and a packet processor. The monitor port is configured to receive a packet of the data flow. The packet processor is coupled to the monitor port, and the packet processor is configured to compute a digest value of the packet and compute an identification code of the packet according to the digest value of the packet, and the packet processor searches a status value associated with the identification code in a lookup table so as to determine whether a dropping event of the data flow is recorded.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: January 2, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kuo-Cheng Lu, Chun-Da Wu, Yu-Hsiu Lin