Patents by Inventor Hsiu-Chi LIU

Hsiu-Chi LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11798858
    Abstract: A semiconductor package structure and a method of manufacturing the same are provided. The semiconductor package structure includes a first electronic component, a second electronic component, and a reinforcement component. The reinforcement component is disposed above the first electronic component and the second electronic component. The reinforcement component is configured to reduce warpage.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: October 24, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Meng-Wei Hsieh, Hsiu-Chi Liu
  • Publication number: 20230017013
    Abstract: A semiconductor package structure and a method of manufacturing the same are provided. The semiconductor package structure includes a first electronic component, a second electronic component, and a reinforcement component. The reinforcement component is disposed above the first electronic component and the second electronic component. The reinforcement component is configured to reduce warpage.
    Type: Application
    Filed: July 15, 2021
    Publication date: January 19, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Wei HSIEH, Hsiu-Chi LIU
  • Publication number: 20220359425
    Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.
    Type: Application
    Filed: May 24, 2022
    Publication date: November 10, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Chiang SHIH, Hung-Yi LIN, Meng-Wei HSIEH, Yu Sheng CHANG, Hsiu-Chi LIU, Mark GERBER
  • Patent number: 11342282
    Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: May 24, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsu-Chiang Shih, Hung-Yi Lin, Meng-Wei Hsieh, Yu Sheng Chang, Hsiu-Chi Liu, Mark Gerber
  • Publication number: 20210265280
    Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.
    Type: Application
    Filed: February 21, 2020
    Publication date: August 26, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Chiang SHIH, Hung-Yi LIN, Meng-Wei HSIEH, Yu Sheng CHANG, Hsiu-Chi LIU, Mark GERBER
  • Patent number: 11094649
    Abstract: Present disclosure provides a semiconductor package structure, which includes a redistribution layer (RDL) structure, an electronic device, a first reinforcement structure, a second reinforcement structure, and an encapsulant. The RDL structure has a passivation layer and a patterned conductive layer disposed in the passivation layer. The electronic device is disposed on the RDL structure. The first reinforcement structure is disposed on the RDL structure and has a first modulus. The second reinforcement structure is disposed on the first reinforcement structure and has a second modulus substantially less than the first modulus. The encapsulant is disposed on the RDL structure and encapsulates the electronic device, the first reinforcement structure and the second reinforcement structure.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: August 17, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Fan-Yu Min, Chen-Hung Lee, Hsiu-Chi Liu, Liang-Chun Chen
  • Publication number: 20210225781
    Abstract: Present disclosure provides a semiconductor package structure, which includes a redistribution layer (RDL) structure, an electronic device, a first reinforcement structure, a second reinforcement structure, and an encapsulant. The RDL structure has a passivation layer and a patterned conductive layer disposed in the passivation layer. The electronic device is disposed on the RDL structure. The first reinforcement structure is disposed on the RDL structure and has a first modulus. The second reinforcement structure is disposed on the first reinforcement structure and has a second modulus substantially less than the first modulus. The encapsulant is disposed on the RDL structure and encapsulates the electronic device, the first reinforcement structure and the second reinforcement structure.
    Type: Application
    Filed: January 21, 2020
    Publication date: July 22, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Fan-Yu MIN, Chen-Hung LEE, Hsiu-Chi LIU, Liang-Chun CHEN
  • Patent number: 10943843
    Abstract: A semiconductor package structure includes a conductive trace layer, a semiconductor die over the conductive trace layer, a structure enhancement layer surrounding the semiconductor die, and an encapsulant covering the semiconductor die and the structure enhancement layer. The structure enhancement layer coincides with a mass center plane of the semiconductor package structure. The mass center plane is parallel to a top surface of the semiconductor die. A method for manufacturing the semiconductor package structure is also provided.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: March 9, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsiu-Chi Liu, Hsu-Nan Fang
  • Publication number: 20200219845
    Abstract: A semiconductor package structure includes a conductive trace layer, a semiconductor die over the conductive trace layer, a structure enhancement layer surrounding the semiconductor die, and an encapsulant covering the semiconductor die and the structure enhancement layer. The structure enhancement layer coincides with a mass center plane of the semiconductor package structure. The mass center plane is parallel to a top surface of the semiconductor die. A method for manufacturing the semiconductor package structure is also provided.
    Type: Application
    Filed: January 7, 2019
    Publication date: July 9, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsiu-Chi LIU, Hsu-Nan FANG