Patents by Inventor Hsiu-Fang Chien
Hsiu-Fang Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145372Abstract: A substrate structure is provided, in which an insulating protection layer is formed on a substrate body having a plurality of electrical contact pads, and the insulating protection layer has a plurality of openings corresponding to the plurality of exposed electrical contact pads, and the insulating protection layer is formed with a hollow portion surrounding a partial edge of at least one of the electrical contact pads at at least one of the openings, so as to reduce the barrier of the insulating protection layer.Type: ApplicationFiled: December 22, 2022Publication date: May 2, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chia-Wen TSAO, Wen-Chen HSIEH, Yi-Lin TSAI, Hsiu-Fang CHIEN
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Publication number: 20240049382Abstract: A carrying structure is provided and is defined with a main area and a peripheral area adjacent to the main area, where a plurality of packaging substrates are disposed in the main area in an array manner, a plurality of positioning holes are disposed in the peripheral area, and a plurality of positioning traces are formed along a part of the edges of the plurality of positioning holes, such that the plurality of positioning traces are formed with notches. Therefore, a plurality of positioning pins on the machine can be easily aligned and inserted into the plurality of positioning holes by the design of the plurality of positioning traces.Type: ApplicationFiled: November 2, 2022Publication date: February 8, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chin-Wei Hsu, Jui-Kun Wang, Shu-Yu Ko, Fang-Wei Chang, Hsiu-Fang Chien
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Publication number: 20240047336Abstract: An electronic package is provided, in which an electronic element is arranged on a carrier structure having a plurality of wire-bonding pads arranged on a surface of the carrier structure, and a plurality of bonding wires are connected to a plurality of electrode pads of the electronic element and the plurality of wire-bonding pads. Further, among any three adjacent ones of the plurality of wire-bonding pads, a long-distanced first wire-bonding pad, a middle-distanced second wire-bonding pad and a short-distanced third wire-bonding pad are defined according to their distances from the electronic element. Therefore, even if the bonding wires on the first to third wire-bonding pads are impacted by an adhesive where a wire sweep phenomenon occurred when the flowing adhesive of a packaging layer covers the electronic element and the bonding wires, the bonding wires still would not contact each other, thereby avoiding short circuit problems.Type: ApplicationFiled: November 7, 2022Publication date: February 8, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Ching-Chih Lin, Wen-Hsin Wang, Chieh-Yi Hsieh, Shin-Yu Wang, Yi-Chien Huang, Hsiu-Fang Chien
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Publication number: 20230343692Abstract: An electronic package is provided and includes a substrate structure, an electronic element disposed on the substrate structure and an encapsulation layer encapsulating the electronic element, where at least one functional circuit is formed on a surface of a substrate body of the substrate structure, and a wire having a smaller width is arranged on a boundary line at a junction between an encapsulation area and a peripheral area, so that when a mold for forming the encapsulation layer is formed to cover the substrate structure, the mold will create a gap around the wire to serve as an exhaust passage. Therefore, when the encapsulation layer is formed, the exhaust passage can be used to exhaust air, so as to avoid problems such as the occurrence of voids or overflows of the encapsulation layer.Type: ApplicationFiled: July 7, 2022Publication date: October 26, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Wen-Chen Hsieh, Ya-Ting Chi, Chia-Wen Tsao, Hsin-Yin Chang, Yi-Lin Tsai, Hsiu-Fang Chien
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Publication number: 20230253342Abstract: An electronic package is provided and includes a substrate structure and an electronic element disposed on the substrate structure. The substrate structure is provided with a plurality of circuits and a reinforcing portion that is free from being electrically connected to the plurality of circuits on a surface of a substrate body of the substrate structure, such that the electronic element is electrically connected to the plurality of circuits and is free from being electrically connected to the reinforcing portion, and the reinforcing portion includes a dummy pad and a trace line connected to the dummy pad to increase a layout area of the reinforcing portion on the substrate body. Therefore, the adhesion of the reinforcing portion can be improved, and the electronic element can be prevented from cracking.Type: ApplicationFiled: August 23, 2022Publication date: August 10, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Hsiu-Fang Chien, Wen-Chen Hsieh, Chia-Wen Tsao, Hsin-Yin Chang, Ya-Ting Chi, Yi-Lin Tsai
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Patent number: 11437325Abstract: An electronic package is provided and has a packaging substrate including a ground pad and a power pad. The power pad surrounds at least three directions of the ground pad so as to increase the footprint of the power pad on the packaging substrate, thereby avoiding cracking of an electronic element disposed on the packaging substrate and effectively reducing the voltage drop.Type: GrantFiled: July 30, 2020Date of Patent: September 6, 2022Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Ho-Chuan Lin, Hsiu-Fang Chien, Chih-Yuan Shih, Tsung-Li Lin
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Publication number: 20210358851Abstract: An electronic package is provided and has a packaging substrate including a ground pad and a power pad. The power pad surrounds at least three directions of the ground pad so as to increase the footprint of the power pad on the packaging substrate, thereby avoiding cracking of an electronic element disposed on the packaging substrate and effectively reducing the voltage drop.Type: ApplicationFiled: July 30, 2020Publication date: November 18, 2021Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Ho-Chuan Lin, Hsiu-Fang Chien, Chih-Yuan Shih, Tsung-Li Lin
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Publication number: 20060076695Abstract: A semiconductor package with flash-absorbing mechanism and a fabrication method thereof are proposed, wherein a flash-absorbing structure is formed on a gold-plated copper layer of a substrate, and adhesion between the flash-absorbing structure and a molding material is larger than that between the molding material and a mold, such that flashes of the molding material are not adhered to the mold after completing a molding process unlike the conventional technology, thereby ensuring quality of the fabricated semiconductor package.Type: ApplicationFiled: September 23, 2005Publication date: April 13, 2006Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Wen-Chen Hsieh, Hsiu-Fang Chien, Chien-Te Chen
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Publication number: 20030040143Abstract: A method is proposed for fabricating a substrate-based semiconductor package without mold flash. The proposed method is characterized by the provision of one or more dummy traces between each overly-spaced pair of signal traces that might cause mold flash in subsequent molding process, so that the solder mask covering over these traces can be made substantially planarized in its top surface without the undesired forming of a recessed portion that would otherwise cause leakage of molding material to the outside of the molding region during molding process. Owing to the provision of these dummy traces, no leakage hole would exist between the molding tool and the solder mask, thus preventing mold flash. The proposed method therefore allows the finished semiconductor package to be more assured in quality.Type: ApplicationFiled: November 14, 2001Publication date: February 27, 2003Inventors: Hsiu-Fang Chien, Chih-Chin Liao