Patents by Inventor Hsiu-Feng Peng

Hsiu-Feng Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory with word-line segment access
    Patent number: 8437215
    Abstract: A memory comprises a row of bit cells, including a first plurality of bit cells and a second plurality of bit cells. A first word line segment driver is connected to the first plurality of bits cells. A second word line segment driver is connected to the second plurality of bits cells. The first and second word line segment drivers are selectively operable for activating one of the first and second pluralities of bit cells at a time to the exclusion of the other plurality of bit cells. A shared sense amplifier is coupled to at least one of the first plurality of bit cells and at least one of the second plurality of bit cells. The shared sense amplifier is configured to receive signals from whichever of the one first or second bit cell is activated by its respective word line segment driver at a given time.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: May 7, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chiting Cheng, Hsiu-Feng Peng, Ming-Zhang Kuo, Chung-Cheng Chou
  • MEMORY WITH WORD-LINE SEGMENT ACCESS
    Publication number: 20120188838
    Abstract: A memory comprises a row of bit cells, including a first plurality of bit cells and a second plurality of bit cells. A first word line segment driver is connected to the first plurality of bits cells. A second word line segment driver is connected to the second plurality of bits cells. The first and second word line segment drivers are selectively operable for activating one of the first and second pluralities of bit cells at a time to the exclusion of the other plurality of bit cells. A shared sense amplifier is coupled to at least one of the first plurality of bit cells and at least one of the second plurality of bit cells. The shared sense amplifier is configured to receive signals from whichever of the one first or second bit cell is activated by its respective word line segment driver at a given time.
    Type: Application
    Filed: January 20, 2011
    Publication date: July 26, 2012
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chiting Cheng, Hsiu-Feng Peng, Ming-Zhang Kuo, Chung-Cheng Chou