Patents by Inventor Hsiu-Hua Lin
Hsiu-Hua Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12009322Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.Type: GrantFiled: February 13, 2022Date of Patent: June 11, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Hsuan Tai, Ting-Ting Kuo, Yu-Chih Huang, Chih-Wei Lin, Hsiu-Jen Lin, Chih-Hua Chen, Ming-Da Cheng, Ching-Hua Hsieh, Hao-Yi Tsai, Chung-Shi Liu
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Publication number: 20240186275Abstract: Semiconductor devices including the use of solder materials and methods of manufacturing are provided. In embodiments the solder materials utilize a first tensile raising material, a second tensile raising material, and a eutectic modifier material. By utilizing the materials a solder material can be formed and used with a reduced presence of needles that may otherwise form during the placement and use of the solder material.Type: ApplicationFiled: January 9, 2023Publication date: June 6, 2024Inventors: Chao-Wei Chiu, Jen-Jui Yu, Hsuan-Ting Kuo, Cheng-Shiuan Wong, Hsiu-Jen Lin, Ching-Hua Hsieh
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Patent number: 11996400Abstract: A manufacturing method of a package-on-package structure includes at least the following steps. Top packages are mounted on a top side of a reconstructed wafer over a flexible tape, where conductive bumps at a bottom side of the reconstructed wafer is attached to the flexible tape, and during the mounting, a shape geometry of the respective conductive bump changes and at least a lower portion of the respective conductive bump is embraced by the flexible tape. The flexible tape is released from the conductive bumps after the mounting.Type: GrantFiled: April 27, 2022Date of Patent: May 28, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-Shuan Chung
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Publication number: 20240153842Abstract: A semiconductor structure includes a die embedded in a molding material, the die having die connectors on a first side; a first redistribution structure at the first side of the die, the first redistribution structure being electrically coupled to the die through the die connectors; a second redistribution structure at a second side of the die opposing the first side; and a thermally conductive material in the second redistribution structure, the die being interposed between the thermally conductive material and the first redistribution structure, the thermally conductive material extending through the second redistribution structure, and the thermally conductive material being electrically isolated.Type: ApplicationFiled: January 4, 2024Publication date: May 9, 2024Inventors: Hao-Jan Pei, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Cheng-Ting Chen, Chia-Lun Chang, Chih-Wei Lin, Hsiu-Jen Lin, Ching-Hua Hsieh, Chung-Shi Liu
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Patent number: 11952004Abstract: A lane change assistance method is provided. The method includes recognizing styles of two traffic lines corresponding to a lane where a vehicle is located. Whether the vehicle violates traffic rules is determined according to the styles of the two traffic lines when the vehicle is performing an operation of changing lanes. A prompt is issued when the vehicle violates traffic rules.Type: GrantFiled: April 20, 2021Date of Patent: April 9, 2024Assignee: Chiun Mai Communication Systems, Inc.Inventors: Hsiu-Hua Yen, Jian-Cheng Lin, Chih-Pu Hsu
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Publication number: 20240113071Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.Type: ApplicationFiled: January 5, 2023Publication date: April 4, 2024Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
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Publication number: 20240105642Abstract: A method of manufacturing a package structure at least includes the following steps. An encapsulant laterally is formed to encapsulate the die and the plurality of through vias. A plurality of first connectors are formed to electrically connect to first surfaces of the plurality of through vias. A warpage control material is formed over the die, wherein the warpage control material is disposed to cover an entire surface of the die. A protection material is formed over the encapsulant and around the plurality of first connectors and the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.Type: ApplicationFiled: November 29, 2023Publication date: March 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
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Publication number: 20240107682Abstract: An embodiment composite material for semiconductor package mount applications may include a first component including a tin-silver-copper alloy and a second component including a tin-bismuth alloy or a tin-indium alloy. The composite material may form a reflowed bonding material having a room temperature tensile strength in a range from 80 MPa to 100 MPa when subjected to a reflow process. The reflowed bonding material may include a weight fraction of bismuth that is in a range from approximately 4% to approximately 15%. The reflowed bonding material may an alloy that is solid solution strengthened by a presence of bismuth or indium that is dissolved within the reflowed bonding material or a solid solution phase that includes a minor component of bismuth dissolved within a major component of tin. In some embodiments, the reflowed bonding material may include intermetallic compounds formed as precipitates such as Ag3Sn and/or Cu6Sn5.Type: ApplicationFiled: April 21, 2023Publication date: March 28, 2024Inventors: Chao-Wei Chiu, Chih-Chiang Tsao, Jen-Jui Yu, Hsuan-Ting Kuo, Hsiu-Jen Lin, Ching-Hua Hsieh
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Patent number: 11942451Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.Type: GrantFiled: August 30, 2021Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Mao-Yen Chang, Yu-Chia Lai, Cheng-Shiuan Wong, Ting Hao Kuo, Ching-Hua Hsieh, Hao-Yi Tsai, Kuo-Lung Pan, Hsiu-Jen Lin
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Patent number: 11942464Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.Type: GrantFiled: July 19, 2021Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu
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Publication number: 20240096740Abstract: Provided is a package structure including a first redistribution layer (RDL) structure, a die, a circuit substrate, and a first thermoelectric cooler. The RDL) structure has a first side and a second side opposite to each other. The die is disposed on the first side of the first RDL structure. The circuit substrate is bonded to the second side of the first RDL structure through a plurality of first conductive connectors. The first thermoelectric cooler is between the first RDL structure and the circuit substrate, wherein the first thermoelectric cooler includes at least a N-type doped region and at least a P-type doped region.Type: ApplicationFiled: January 9, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chao-Wei Chiu, Chao-Wei Li, Hsiu-Jen Lin, Ching-Hua Hsieh
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Publication number: 20240088062Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.Type: ApplicationFiled: November 23, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
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Publication number: 20240071952Abstract: A method includes depositing solder paste over first contact pads of a first package component. Spring connectors of a second package component are aligned to the solder paste. The solder paste is reflowed to electrically and physically couple the spring connectors of the second package component to the first contact pads of the first package component. A device includes a first package component and a second package component electrically and physically coupled to the first package component by way of a plurality of spring coils. Each of the plurality of spring coils extends from the first package component to the second package component.Type: ApplicationFiled: January 10, 2023Publication date: February 29, 2024Inventors: Chih-Chiang Tsao, Hsuan-Ting Kuo, Chao-Wei Chiu, Hsiu-Jen Lin, Ching-Hua Hsieh
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Patent number: 11758076Abstract: A clock generator device includes a detector circuit, a calibration circuit, and a free running oscillator. The detector circuit is configured to determine whether a reference clock signal is received from a transmission interface to output an enable signal. The calibration circuit is configured to generate a first signal in response to the enable signal and an output clock signal, and compare the first signal with a predetermined value to generate a calibration signal. The free running oscillator is configured to adjust a frequency of the output clock signal in response to the calibration signal.Type: GrantFiled: November 23, 2021Date of Patent: September 12, 2023Assignee: SIGMASTAR TECHNOLOGY LTD.Inventors: Wei-Ping Wang, Hsiu-Hua Lin, Yu-Hung Kuo
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Publication number: 20220224804Abstract: A clock generator device includes a detector circuit, a calibration circuit, and a free running oscillator. The detector circuit is configured to determine whether a reference clock signal is received from a transmission interface to output an enable signal. The calibration circuit is configured to generate a first signal in response to the enable signal and an output clock signal, and compare the first signal with a predetermined value to generate a calibration signal. The free running oscillator is configured to adjust a frequency of the output clock signal in response to the calibration signal.Type: ApplicationFiled: November 23, 2021Publication date: July 14, 2022Inventors: Wei-Ping Wang, Hsiu-Hua Lin, Yu-Hung Kuo
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Publication number: 20040082078Abstract: A test pen includes an integral hollow pen barrel. The hollow pen barrel is divided into four sections in order being a dip section, a testing and observation section, a drying section, and a sealed rear section. The dip section has a front opening allowing a slender water-absorbing member to pass therethrough. An air balance hole is provided on the dip section of the pen barrel to facilitate liquid siphoning. A pen cap for capping the dip section has a flexible inner fringe for keeping the dip section airtight. A rear plug is provided for sealing the rear section. A testing member is installed in the testing and observation section. The testing member includes a support card, a solid carrier, a conjugate release pad partially overlapping the front end of the solid carrier, an absorbing pad partially overlapping the rear end of the solid carrier, and a cover tape.Type: ApplicationFiled: April 22, 2003Publication date: April 29, 2004Inventors: Hsiu-Hua Lin, Hsiao-Wei Tsai, Chih-Ming Lo
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Publication number: 20030106872Abstract: A nipple includes a nipple body, a peripheral flange, an air intake tube, and an inlet hole. The flange extends outwardly from a periphery of the nipple body, and has upper and lower flange surfaces. The lower flange surface has a recess which is confined by a side wall and a top wall. The air intake tube projects into the recess from the top wall, and has an end part formed with a split for passage of air. The split divides the end part into two openable valve members. Reinforcement ribs respectively connect the valve members to the side wall, thus strengthening the valve members.Type: ApplicationFiled: December 10, 2001Publication date: June 12, 2003Inventor: Hung-Hsiu-Hua Lin