Patents by Inventor Hsiu-Jung Li

Hsiu-Jung Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230230912
    Abstract: An electronic package is provided, which includes a substrate structure and an electronic element and a passive element disposed on the substrate structure, where a die placement area and a functional area separated from each other are defined on a surface of a substrate body of the substrate structure, so that a routing layer is arranged with linear conductive traces with a smaller width in the die placement area, and a sheet-shaped circuit with a larger width and electrically connected to the linear conductive traces is arranged in the functional area, so as to reduce a metal area on the surface of the substrate body, thereby avoiding the problem of warpage caused by stress concentration in the die placement area.
    Type: Application
    Filed: December 8, 2022
    Publication date: July 20, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Wan-Rou CHEN, Yi-Wen LIU, Hsiu-Jung LI, Yi-Chen CHI, Tsung-Li LIN
  • Patent number: 9524944
    Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion d having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: December 20, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chun-Wei Yeh, Chun-Hsien Shen, Hsiu-Jung Li, Ya-Yi Lai, Fu-Tang Huang
  • Publication number: 20160247773
    Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have, a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion d having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.
    Type: Application
    Filed: May 2, 2016
    Publication date: August 25, 2016
    Inventors: Chun-Wei Yeh, Chun-Hsien Shen, Hsiu-Jung Li, Ya-Yi Lai, Fu-Tang Huang
  • Patent number: 9362245
    Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion and having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: June 7, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chun-Wei Yeh, Chun-Hsien Shen, Hsiu-Jung Li, Ya-Yi Lai, Fu-Tang Huang
  • Publication number: 20140327131
    Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion and having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.
    Type: Application
    Filed: August 20, 2013
    Publication date: November 6, 2014
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Chun-Wei Yeh, Chun-Hsien Shen, Hsiu-Jung Li, Ya-Yi Lai, Fu-Tang Huang