Abstract: A method for designing a two-dimensional array overlay target comprises the steps of: selecting a plurality of two dimensional array overlay targets having different overlay errors; calculating a deviation of a simulated diffraction spectrum for each two-dimensional array overlay target; selecting an error-independent overlay target by taking the deviations of the simulated diffraction spectra into consideration; and designing a two dimensional array overlay target based on structural parameters of the error-independent overlay target.

Abstract: A thin metal film measurement method is disclosed. The method includes the following steps. A respective capacitance is measured before and after a thin metal film is formed. The thickness of the thin metal film is calculated according to the variation of the capacitance. In an embodiment, the capacitance is measured respectively by a capacitance measuring module before and after the thin metal film is formed so as to calculate the thickness of the thin metal film. In another embodiment, a pair of capacitance measuring modules opposite at up and down sides is applied to measure the capacitance before and after the thin metal film is formed so as to calculate the thickness of the thin metal film.

Abstract: A method for designing a two-dimensional array overlay target set comprises the steps of: selecting a plurality of two-dimensional array overlay target sets having different overlay errors; calculating a deviation of a simulated diffraction spectra for each two-dimensional array overlay target set; selecting a sensitive overlay target set by taking the deviations of the simulated diffraction spectra into consideration; and designing a two-dimensional array overlay target set based on the structural parameters of the sensitive overlay target set.

Abstract: A system for via structure measurement is disclosed. The system comprises a reflectometer, a simulation unit and a comparing unit. The reflectometer is configured to collect a measured diffraction spectrum of at least a via. The simulation unit is configured to provide simulated diffraction spectrums of the at least a via. The comparing unit is configured to determine at least a depth and at least a bottom profile of the at least a via by comparing the collected diffraction spectrum and the simulated diffraction spectrums.

Abstract: A system for via structure measurement is disclosed. The system comprises a reflectometer, a simulation unit and a comparing unit. The reflectometer is configured to collect a measured diffraction spectrum of at least a via. The simulation unit is configured to provide simulated diffraction spectrums of the at least a via. The comparing unit is configured to determine at least a depth and at least a bottom profile of the at least a via by comparing the collected diffraction spectrum and the simulated diffraction spectrums.

Abstract: A method for designing a two-dimensional array overlay target set comprises the steps of: selecting a plurality of two-dimensional array overlay target sets having different overlay errors; calculating a deviation of a simulated diffraction spectra for each two-dimensional array overlay target set; selecting a sensitive overlay target set by taking the deviations of the simulated diffraction spectra into consideration; and designing a two-dimensional array overlay target set based on the structural parameters of the sensitive overlay target set.

Abstract: A method for designing a two-dimensional array overlay target comprises the steps of: selecting a plurality of two dimensional array overlay targets having different overlay errors; calculating a deviation of a simulated diffraction spectrum for each two-dimensional array overlay target; selecting an error-independent overlay target by taking the deviations of the simulated diffraction spectra into consideration; and designing a two dimensional array overlay target based on structural parameters of the error-independent overlay target.

Abstract: In an overlay metrology method used during semiconductor device fabrication, an overlay alignment mark facilitates alignment and/or measurement of alignment error of two layers on a semiconductor wafer structure, or different exposures on the same layer. A target is small enough to be positioned within the active area of a semiconductor device combined with appropriate measurement methods, which result in improved measurement accuracy.

Abstract: In systems and methods measure overlay error in semiconductor device manufacturing based on target image asymmetry. As a result, the advantages of using very small in-chip targets can be achieved, while their disadvantages are reduced or eliminated. Methods for determining overlay error based on measured asymmetry can be used with existing measurement tools and systems. These methods allow for improved manufacturing of semiconductor devices and similar devices formed from layers.

Abstract: In systems and methods measure overlay error in semiconductor device manufacturing based on target image asymmetry. As a result, the advantages of using very small in-chip targets can be achieved, while their disadvantages are reduced or eliminated. Methods for determining overlay error based on measured asymmetry can be used with existing measurement tools and systems. These methods allow for improved manufacturing of semiconductor devices and similar devices formed from layers.