Patents by Inventor HSIU LUN YEH

HSIU LUN YEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11832371
    Abstract: The present disclosure provides an over-voltage protection device. The over-voltage protection device includes a substrate, a stack structure disposed over the substrate. The stack structure includes a first insulation structure, a second insulation structure, and a conductive layer. The conductive layer is disposed on the first insulation structure, and the second insulation structure is disposed on the conductive layer. The second insulation structure has an insulation air gap, which has an upper width greater than a lower width.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: November 28, 2023
    Assignee: INPAQ TECHNOLOGY CO., LTD.
    Inventors: I-Jang Teng, Chun Peng Lin, Hsiu Lun Yeh
  • Publication number: 20230156897
    Abstract: The present disclosure provides an over-voltage protection device. The over-voltage protection device includes a substrate, a stack structure disposed over the substrate. The stack structure includes a first insulation structure, a second insulation structure, and a conductive layer. The conductive layer is disposed on the first insulation structure, and the second insulation structure is disposed on the conductive layer. The second insulation structure has an insulation air gap, which has an upper width greater than a lower width.
    Type: Application
    Filed: February 17, 2022
    Publication date: May 18, 2023
    Inventors: I-Jang TENG, Chun Peng LIN, Hsiu Lun YEH
  • Patent number: 10468378
    Abstract: The present disclosure provides a method for preparing a semiconductor package having a standard size from a die having a size smaller than the standard size. The method includes: providing a wafer; forming a die on the wafer, wherein the die has a size smaller than one-half of a standard size 0201; dicing the die from the wafer; encapsulating the die to form an encapsulated die; and singulating the encapsulated die to form a semiconductor package having a size equal to or larger than the standard size 0201.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: November 5, 2019
    Assignee: INPAQ TECHNOLOGY CO., LTD.
    Inventors: Yu-Ming Peng, Chu-Chun Hsu, Hung-Shung Ko, Hsiu-Lun Yeh
  • Publication number: 20180269123
    Abstract: The present disclosure provides a semiconductor package having a size equal to or larger than standard size 0201. The semiconductor package includes a die and a packing member. The size of the die is smaller than one-half of the standard size 0201, and the packing member encapsulates the die.
    Type: Application
    Filed: July 26, 2017
    Publication date: September 20, 2018
    Inventors: Yu-Ming PENG, Chu-Chun HSU, Hung-Shung KO, Hsiu-Lun YEH
  • Publication number: 20180269180
    Abstract: The present disclosure provides a method for preparing a semiconductor package having a standard size from a die having a size smaller than the standard size. The method includes: providing a wafer; forming a die on the wafer, wherein the die has a size smaller than one-half of a standard size 0201; dicing the die from the wafer; encapsulating the die to form an encapsulated die; and singulating the encapsulated die to form a semiconductor package having a size equal to or larger than the standard size 0201.
    Type: Application
    Filed: July 26, 2017
    Publication date: September 20, 2018
    Inventors: Yu-Ming PENG, Chu-Chun HSU, Hung-Shung KO, Hsiu-Lun YEH
  • Patent number: 9099861
    Abstract: An over-voltage protection device includes a substrate, an insulation layer having a depression over the substrate, a conductor layer having a first electrode and a second electrode over the insulation layer, wherein the first electrode and the second electrode form a discharge path, and the depression is under the discharge path. A method for preparing the over-voltage protection device includes the steps of forming an insulation layer over a substrate; forming a depression in the insulation layer; forming a photoresist pattern filling the depression and protruding the insulation layer; forming a conductor layer over the insulation layer; and removing the photoresist pattern, wherein the photoresist pattern divides the conductor layer into a first electrode and a second electrode that form a discharge path, and the depression is under the discharge path after the removal of the photoresist pattern.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: August 4, 2015
    Assignee: INPAQ TECHNOLOGY CO., LTD.
    Inventors: Hsiu Lun Yeh, Yu Chia Chang, Tze Chun Liu, Hsiu Mei Hsu
  • Publication number: 20140347772
    Abstract: An over-voltage protection device includes a substrate, an insulation layer having a depression over the substrate, a conductor layer having a first electrode and a second electrode over the insulation layer, wherein the first electrode and the second electrode form a discharge path, and the depression is under the discharge path. A method for preparing the over-voltage protection device includes the steps of forming an insulation layer over a substrate; forming a depression in the insulation layer; forming a photoresist pattern filling the depression and protruding the insulation layer; forming a conductor layer over the insulation layer; and removing the photoresist pattern, wherein the photoresist pattern divides the conductor layer into a first electrode and a second electrode that form a discharge path, and the depression is under the discharge path after the removal of the photoresist pattern.
    Type: Application
    Filed: May 23, 2013
    Publication date: November 27, 2014
    Applicant: INPAQ TECHNOLOGY CO., LTD.
    Inventors: HSIU LUN YEH, YU CHIA CHANG, TZE CHUN LIU, HSIU MEI HSU