Patents by Inventor Hsiu-Ming Chen

Hsiu-Ming Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11538912
    Abstract: A method of forming a semiconductor structure includes following steps. A first isolation is formed between a pair of active regions. A gate structure is formed on the first isolation structure. The active regions are etched to form recesses with curved top surfaces. The active regions are etched again to change each of the curved top surfaces to be a top surface and a sidewall substantially perpendicular to the top surface. A pair of contacts is formed respectively on the active regions, such that each of the contacts has a bottom surface and a sidewall substantially perpendicular to the bottom surface.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: December 27, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Sheng-Hwa Lee, Hsiu-Ming Chen
  • Publication number: 20210399101
    Abstract: A method of forming a semiconductor structure includes following steps. A first isolation is formed between a pair of active regions. A gate structure is formed on the first isolation structure. The active regions are etched to form recesses with curved top surfaces. The active regions are etched again to change each of the curved top surfaces to be a top surface and a sidewall substantially perpendicular to the top surface. A pair of contacts is formed respectively on the active regions, such that each of the contacts has a bottom surface and a sidewall substantially perpendicular to the bottom surface.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Inventors: Sheng-Hwa LEE, Hsiu-Ming CHEN
  • Patent number: 11145727
    Abstract: A semiconductor structure includes a pair of active regions, a first isolation structure, a gate structure, and a pair of contacts. The first isolation structure is disposed between the active regions. The gate structure is disposed on the first isolation structure. The contacts are respectively disposed on the active regions. Each of the contacts has a bottom surface and a sidewall substantially perpendicular to the bottom surface.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: October 12, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Sheng-Hwa Lee, Hsiu-Ming Chen
  • Publication number: 20210126095
    Abstract: A semiconductor structure includes a pair of active regions, a first isolation structure, a gate structure, and a pair of contacts. The first isolation structure is disposed between the active regions. The gate structure is disposed on the first isolation structure. The contacts are respectively disposed on the active regions. Each of the contacts has a bottom surface and a sidewall substantially perpendicular to the bottom surface.
    Type: Application
    Filed: October 29, 2019
    Publication date: April 29, 2021
    Inventors: Sheng-Hwa LEE, Hsiu-Ming CHEN
  • Patent number: 10453947
    Abstract: A semiconductor device includes a substrate, a flowable dielectric material and a GaN-based semiconductor layer. The substrate has a pit exposed from an upper surface of the substrate, the flowable dielectric material fully fills the pit, and the GaN-based semiconductor layer is disposed over the substrate and the flowable dielectric material.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: October 22, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Yung-Fung Lin, Cheng-Wei Chou, Szu-Yao Chang, Cheng-Tao Chou, Hsiu-Ming Chen