Patents by Inventor Hsiu-Mu Tang

Hsiu-Mu Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9324909
    Abstract: Disclosed herein is a light emitting diode, the structure of the light emitting diode comprises a substrate, a first-type semiconductor layer, a structural layer, a light emitting layer, a second-type semiconductor layer, a transparent conductive layer, a first contact pad and a second contact pad in regular turn. The structural layer comprises a stacked structure having a trapezoid sidewall and nano columns extending from the trapezoid sidewall in regular arrangement. Also, a method for fabricating the light emitting diode is disclosed.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: April 26, 2016
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Chang-Chin Yu, Hsiu-Mu Tang, Mong-Ea Lin
  • Publication number: 20150280064
    Abstract: Disclosed herein is a light emitting diode, the structure of the light emitting diode comprises a substrate, a first-type semiconductor layer, a structural layer, a light emitting layer, a second-type semiconductor layer, a transparent conductive layer, a first contact pad and a second contact pad in regular turn. The structural layer comprises a stacked structure having a trapezoid sidewall and nano columns extending from the trapezoid sidewall in regular arrangement. Also, a method for fabricating the light emitting diode is disclosed.
    Type: Application
    Filed: June 15, 2015
    Publication date: October 1, 2015
    Inventors: Chang-Chin YU, Hsiu-Mu TANG, Mong-Ea LIN
  • Patent number: 9087960
    Abstract: Disclosed herein is a light emitting diode, the structure of the light emitting diode comprises a substrate, a first-type semiconductor layer, a structural layer, a light emitting layer, a second-type semiconductor layer, a transparent conductive layer, a first contact pad and a second contact pad in regular turn. The structural layer comprises a stacked structure having a trapezoid sidewall and nano columns extending from the trapezoid sidewall in regular arrangement. Also, a method for fabricating the light emitting diode is disclosed.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: July 21, 2015
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Chang-Chin Yu, Hsiu-Mu Tang, Mong-Ea Lin
  • Patent number: 9064998
    Abstract: A light emitting diode includes a substrate, a first-type semiconductor layer, a nanorod layer and a transparent planar layer. The first-type semiconductor layer is disposed over the substrate. The nanorod layer is formed on the first-type semiconductor layer. The nanorod layer includes a plurality of nanorods and each of the nanorods has a quantum well structure and a second-type semiconductor layer. The quantum well structure is in contact with the first-type semiconductor layer, and the second-type semiconductor layer is formed on the quantum well structure. The transparent planar layer is filled between the nanorods. A surface of the second-type semiconductor layer is exposed out of the transparent planar layer.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: June 23, 2015
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Chang-Chin Yu, Hsiu-Mu Tang, Mong-Ea Lin
  • Publication number: 20150079716
    Abstract: A light emitting diode includes a substrate, a first-type semiconductor layer, a nanorod layer and a transparent planar layer. The first-type semiconductor layer is disposed over the substrate. The nanorod layer is formed on the first-type semiconductor layer. The nanorod layer includes a plurality of nanorods and each of the nanorods has a quantum well structure and a second-type semiconductor layer. The quantum well structure is in contact with the first-type semiconductor layer, and the second-type semiconductor layer is formed on the quantum well structure. The transparent planar layer is filled between the nanorods. A surface of the second-type semiconductor layer is exposed out of the transparent planar layer.
    Type: Application
    Filed: November 26, 2014
    Publication date: March 19, 2015
    Inventors: Chang-Chin YU, Hsiu-Mu TANG, Mong-Ea LIN
  • Patent number: 8946675
    Abstract: A light emitting diode includes a substrate, a first-type semiconductor layer, a nanorod layer and a transparent planar layer. The first-type semiconductor layer is disposed over the substrate. The nanorod layer is formed on the first-type semiconductor layer. The nanorod layer includes a plurality of nanorods and each of the nanorods has a quantum well structure and a second-type semiconductor layer. The quantum well structure is in contact with the first-type semiconductor layer, and the second-type semiconductor layer is formed on the quantum well structure. The transparent planar layer is filled between the nanorods. A surface of the second-type semiconductor layer is exposed out of the transparent planar layer.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: February 3, 2015
    Assignee: Lextar Electronics Corporation
    Inventors: Chang-Chin Yu, Hsiu-Mu Tang, Mong-Ea Lin
  • Patent number: 8659029
    Abstract: A low contact resistance semiconductor structure includes a substrate, a semiconductor stacked layer, a low contact resistance layer and a transparent conductive layer. The low contact resistance layer is formed on one side of a P-type GaN layer of the semiconductor stacked layer. The low contact resistance layer is formed at a thickness smaller than 100 Angstroms and made of a material selected from the group consisting of aluminum, gallium, indium, and combinations thereof. Through the low contact resistance layer, the resistance between the P-type GaN layer and transparent conductive layer can be reduced and light emission efficiency can be improved when being used on LEDs. The method of fabricating the low contact resistance semiconductor structure of the invention forms a thin and consistent low contact resistance layer through a Metal Organic Chemical Vapor Deposition (MOCVD) method to enhance matching degree among various layers.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: February 25, 2014
    Assignee: Lextar Electronics Corporation
    Inventors: Te-Chung Wang, Fu-Bang Chen, Hsiu-Mu Tang
  • Publication number: 20140027802
    Abstract: An LED with undercut includes a first semiconductor layer, an illumination layer, a second semiconductor layer, a first electrode and a second electrode. The first semiconductor layer includes a first area and a second area. A first acute angle is included between a first slanted wall and a first top surface of the first area. The illuminating layer is formed on the second area. The second semiconductor is formed on the illuminating layer. The first and second electrodes are respectively formed on the first top surface and the second semiconductor layer. The first semiconductor layer on the second area, the illuminating layer and the second semiconductor layer on the first semiconductor layer form a MESA structure. The MESA structure includes a second slanted wall adjacent to the first area. A second acute angle is included between the second slanted wall and the first top surface.
    Type: Application
    Filed: May 29, 2013
    Publication date: January 30, 2014
    Applicant: LEXTRA ELECTRONICS CORPORATION
    Inventors: Chang-Chin Yu, Hsiu-Mu Tang, Mong-Ea Lin
  • Publication number: 20130341589
    Abstract: A light emitting diode includes a substrate, a first-type semiconductor layer, a nanorod layer and a transparent planar layer. The first-type semiconductor layer is disposed over the substrate. The nanorod layer is formed on the first-type semiconductor layer. The nanorod layer includes a plurality of nanorods and each of the nanorods has a quantum well structure and a second-type semiconductor layer. The quantum well structure is in contact with the first-type semiconductor layer, and the second-type semiconductor layer is formed on the quantum well structure. The transparent planar layer is filled between the nanorods. A surface of the second-type semiconductor layer is exposed out of the transparent planar layer.
    Type: Application
    Filed: March 12, 2013
    Publication date: December 26, 2013
    Applicant: LEXTAR ELECTRONICS CORPORATION
    Inventors: Chang-Chin Yu, Hsiu-Mu Tang, Mong-Ea Lin
  • Publication number: 20130328010
    Abstract: A high brightness light-emitting diode free of p-type gallium nitride (GaN) layer is provided, which includes an n-type semiconductor layer, a multi-quantum well (MQW) layer, a p-type indium gallium nitride (InGaN) layer and an indium tin oxide (ITO) layer. The grain size of the ITO layer is ranging from 5 to 1000 angstroms. A method for manufacturing the high brightness light-emitting diode is also provided.
    Type: Application
    Filed: March 11, 2013
    Publication date: December 12, 2013
    Applicant: LEXTAR ELECTRONICS CORPORATION
    Inventors: Chang-Chin Yu, Hsiu-Mu Tang, Mong-Ea Lin
  • Publication number: 20130328057
    Abstract: Disclosed herein is a light emitting diode, the structure of the light emitting diode comprises a substrate, a first-type semiconductor layer, a structural layer, a light emitting layer, a second-type semiconductor layer, a transparent conductive layer, a first contact pad and a second contact pad in regular turn. The structural layer comprises a stacked structure having a trapezoid sidewall and nano columns extending from the trapezoid sidewall in regular arrangement. Also, a method for fabricating the light emitting diode is disclosed.
    Type: Application
    Filed: June 6, 2013
    Publication date: December 12, 2013
    Inventors: Chang-Chin Yu, Hsiu-Mu Tang, Mong-Ea Lin
  • Publication number: 20120241752
    Abstract: A low contact resistance semiconductor structure includes a substrate, a semiconductor stacked layer, a low contact resistance layer and a transparent conductive layer. The low contact resistance layer is formed on one side of a P-type GaN layer of the semiconductor stacked layer. The low contact resistance layer is formed at a thickness smaller than 100 Angstroms and made of a material selected from the group consisting of aluminum, gallium, indium, and combinations thereof. Through the low contact resistance layer, the resistance between the P-type GaN layer and transparent conductive layer can be reduced and light emission efficiency can be improved when being used on LEDs. The method of fabricating the low contact resistance semiconductor structure of the invention forms a thin and consistent low contact resistance layer through a Metal Organic Chemical Vapor Deposition (MOCVD) method to enhance matching degree among various layers.
    Type: Application
    Filed: November 21, 2011
    Publication date: September 27, 2012
    Inventors: Te-Chung Wang, Fu-Bang Chen, Hsiu-Mu Tang