Abstract: A dynamic aperture module includes a blade set and a driving portion. The blade set includes a plurality of blades, which are disposed around an optical axis to form a light through hole and rotatable for adjusting the light through hole. The driving portion includes a rotating element, at least one magnet and at least one coil. The rotating element corresponds to the blades and is configured to drive the blades to rotate, so that a dimension of the light through hole is variable. The magnet includes four polarities. The polarities of the magnet are relatively distributed along a direction surrounding the optical axis and a direction parallel to the optical axis, respectively. The coil corresponds to the magnet, and one of the magnet and the coil is disposed on the rotating element. The magnet and the coil are disposed along the direction parallel to the optical axis.

Abstract: A layer allocating apparatus for a multi-layer circuit board is disclosed. In a preferred embodiment, the layer allocating apparatus arranged from top to bottom as a component layer, a ground layer, a power layer, and a solder layer. The powerlayer is sliced into a plurality of reference ground areas each is located at somewhere to correspond to signal layout areas of the solder layer, so as to allow signal lines of the component layer and solder layer to take reference to the reference ground areas on the adjacent power layer. The power layer also includes a plurality of power layers each provides different operating voltages, and electrically couples with corresponding power layouts of the solder layer and component layer through vias, thereby enlarging the total area of power planes, so as to provide a table power source and attenuate the ground/bounce effect.

Abstract: A solder ball allocation on a chip, and a method of the same are provided. The chip has a substrate, first solder balls and second solder balls. The first solder balls are located on a periphery of the substrate and arranged outwardly. The second solder balls are located in a central part of the substrate and arranged with several first geometric patterns that construct a second geometric pattern. The first geometric patterns are also arranged to divide the chip into several power source blocks. The conflict between the second solder balls and the power source blocks are analyzed to remove the second solder balls with conflicts. The power line can go through the middle directly to avoid the power source bypass, or other reasons that cause the chip unable to work stable. The invention divides the chip into several power source blocks without increase the chip volume and cost.

Abstract: A layer allocating apparatus for a multi-layer circuit board is disclosed. In a preferred embodiment, the layer allocating apparatus arranged from top to bottom as a component layer, a ground layer, a power layer, and a solder layer. The powerlayer is sliced into a plurality of reference ground areas each is located at somewhere to correspond to signal layout areas of the solder layer, so as to allow signal lines of the component layer and solder layer to take reference to the reference ground areas on the adjacent power layer. The power layer also includes a plurality of power layers each provides different operating voltages, and electrically couples with corresponding power layouts of the solder layer and component layer through vias, thereby enlarging the total area of power planes, so as to provide a table power source and attenuate the ground/bounce effect.

Abstract: A solder ball allocation on a chip, and a method of the same are provided. The chip has a substrate, first solder balls and second solder balls. The first solder balls are located in a periphery of the substrate and arranged outwardly. The second solder balls are located in a central part of the substrate and arranged with several first geometric patterns that construct a second geometric pattern. The first geometric patterns are also arranged to divide the chip into several power source blocks. The conflict between the second solder balls and the power source blocks are analyzed to remove the second solder balls with conflicts. The power line can go through the middle directly to avoid the power source bypass, or other reasons that cause the chip unable to work stable. The invention divides the chip into several power source blocks without increase the chip volume and cost.