Patents by Inventor Hsiuan-ju Hsu

Hsiuan-ju Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8319298
    Abstract: An integrated circuit module includes a carrier substrate, a semiconductor die disposed in the carrier substrate, a ground pad disposed on the carrier substrate, and an antenna partially embedded in the carrier substrate. The antenna includes a ground layer in thermal contact with the ground pad for dissipating heat generated from the semiconductor die.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: November 27, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Hsiuan-Ju Hsu
  • Patent number: 8153906
    Abstract: The embodiment of the invention is about a novel interconnection structure which can be incorporated into a variety of connectors, as well as other types of interconnections in order to reduce crosstalk, to improve signal integrity and to achieve EM emission compliance. A 4-via (2 signal vias, 1 power via, and 1 ground via) interconnection structure was used for demonstrating the effect of the novel interconnection structure. The same concept can be applied to any multi-via and multi-layer interconnection structure such as PCB, IC packaging circuit, or die circuit. Vias that have an electrical property can be added adjacent to the basic 4-via interconnection structure to achieve a multi-via interconnection structure. For 1-via (1 signal via or 1 power via), 2-via (1 signal via and 1 ground via or 1 signal via and 1 power via) and 3-via (1 signal via, 1 ground via, and 1 power via) interconnection structure, the proposed interconnection structure based upon the same concept can be applied as well.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: April 10, 2012
    Inventors: Hsiuan-ju Hsu, Richard Walter Ziolkowski
  • Patent number: 8084695
    Abstract: The embodiment of the invention is about a novel via structure which can be incorporated into printed circuit boards, integrated circuit packages, and integrated circuits in order to reduce crosstalk, to improve signal integrity and to achieve EM emission compliance. A 4-layer (2 signal layers and 2 power layers or 2 signal layers and 2 ground layers) circuit board assembly was used for demonstrating the effect of the novel via structure. The same concept can be applied to any multi-layer circuit board. Layers that have an electrical property can be added above, under, or within the basic 4-layer circuit board to achieve a multi-layer circuit board. For 2-layer and 3-layer circuit boards, a deformed version of the proposed via structure based upon the same concept will be needed for a coplanar waveguide configuration.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: December 27, 2011
    Inventors: Hsiuan-ju Hsu, Richard Walter Ziolkowski
  • Publication number: 20110127665
    Abstract: An integrated circuit module includes a carrier substrate, a semiconductor die disposed in the carrier substrate, a ground pad disposed on the carrier substrate, and an antenna partially embedded in the carrier substrate. The antenna includes a ground layer in thermal contact with the ground pad for dissipating heat generated from the semiconductor die.
    Type: Application
    Filed: February 8, 2010
    Publication date: June 2, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: HSIUAN-JU HSU
  • Publication number: 20080314631
    Abstract: The embodiment of the invention is about a novel via structure which can be incorporated into printed circuit boards, integrated circuit packages, and integrated circuits in order to reduce crosstalk, to improve signal integrity and to achieve EM emission compliance. A 4-layer (2 signal layers and 2 power layers or 2 signal layers and 2 ground layers) circuit board assembly was used for demonstrating the effect of the novel via structure. The same concept can be applied to any multi-layer circuit board. Layers that have an electrical property can be added above, under, or within the basic 4-layer circuit board to achieve a multi-layer circuit board. For 2-layer and 3-layer circuit boards, a deformed version of the proposed via structure based upon the same concept will be needed for a coplanar waveguide configuration.
    Type: Application
    Filed: January 10, 2007
    Publication date: December 25, 2008
    Inventors: Hsiuan-ju Hsu, Richard Walter Ziolkowski
  • Publication number: 20080289869
    Abstract: The embodiment of the invention is about a novel via structure which can be incorporated into printed circuit boards, integrated circuit packages, and integrated circuits in order to reduce crosstalk, to improve signal integrity and to achieve EM emission compliance. A 4-layer (2 signal layers and 2 power layers or 2 signal layers and 2 ground layers) circuit board assembly was used for demonstrating the effect of the novel via structure. The same concept can be applied to any multi-layer circuit board. Layers that have an electrical property can be added above, under, or within the basic 4-layer circuit board to achieve a multi-layer circuit board. For 2-layer and 3-layer circuit boards, a deformed version of the proposed via structure based upon the same concept will be needed for a coplanar waveguide configuration.
    Type: Application
    Filed: July 9, 2008
    Publication date: November 27, 2008
    Inventors: Hsiuan-ju HSU, Richard Walter Ziolkowski
  • Publication number: 20080169125
    Abstract: The embodiment of the invention is about a novel interconnection structure which can be incorporated into a variety of connectors, as well as other types of interconnections in order to reduce crosstalk, to improve signal integrity and to achieve EM emission compliance. A 4-via (2 signal vias, 1 power via, and 1 ground via) interconnection structure was used for demonstrating the effect of the novel interconnection structure. The same concept can be applied to any multi-via and multi-layer interconnection structure such as PCB, IC packaging circuit, or die circuit. Vias that have an electrical property can be added adjacent to the basic 4-via interconnection structure to achieve a multi-via interconnection structure. For 1-via (1 signal via or 1 power via), 2-via (1 signal via and 1 ground via or 1 signal via and 1 power via) and 3-via (1 signal via, 1 ground via, and 1 power via) interconnection structure, the proposed interconnection structure based upon the same concept can be applied as well.
    Type: Application
    Filed: November 20, 2007
    Publication date: July 17, 2008
    Inventors: Hsiuan-ju Hsu, Richard Walter Ziolkowski
  • Patent number: RE44586
    Abstract: The embodiment of the invention is about a novel via structure which can be incorporated into printed circuit boards, integrated circuit packages, and integrated circuits in order to reduce crosstalk, to improve signal integrity and to achieve EM emission compliance. A 4-layer (2 signal layers and 2 power layers or 2 signal layers and 2 ground layers) circuit board assembly was used for demonstrating the effect of the novel via structure. The same concept can be applied to any multi-layer circuit board. Layers that have an electrical property can be added above, under, or within the basic 4-layer circuit board to achieve a multi-layer circuit board. For 2-layer and 3-layer circuit boards, a deformed version of the proposed via structure based upon the same concept will be needed for a coplanar waveguide configuration.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: November 12, 2013
    Inventors: Hsiuan-ju Hsu, Richard Walter Ziolkowski