Abstract: A signal receiving device and an equalizer tuning method thereof are provided. A first equalizer receives an input signal and generates a first equalized signal by compensating the input signal according to a first equalization parameter. A second equalizer generates a second equalized signal by compensating the first equalized signal according to a second equalization parameter. A clock and data recovery circuit recovers the second equalized signal to generate an output signal. An equalizing controller receives the input signal and outputs a first control signal and a second control signal, to adjust the first equalization parameter according to the first control signal and adjust the second equalization parameter according to the second control signal. The equalizing controller detects a first pattern symbol and a second pattern symbol from the output signal and tunes the second equalization parameter according to the number of the first pattern symbol and the second pattern symbol.

Abstract: A signal receiving device and an equalizer tuning method thereof are provided. A first equalizer receives an input signal and generates a first equalized signal by compensating the input signal according to a first equalization parameter. A second equalizer generates a second equalized signal by compensating the first equalized signal according to a second equalization parameter. A clock and data recovery circuit recovers the second equalized signal to generate an output signal. An equalizing controller receives the input signal and outputs a first control signal and a second control signal, to adjust the first equalization parameter according to the first control signal and adjust the second equalization parameter according to the second control signal. The equalizing controller detects a first pattern symbol and a second pattern symbol from the output signal and tunes the second equalization parameter according to the number of the first pattern symbol and the second pattern symbol.

Abstract: A packaged circuit including a digital controller, a port physical layer and a digital coding circuit is provided. The digital controller outputs digital data in parallel via a parallel data channel, and the digital data includes a plurality of data bits. The port physical layer includes a clock generator, and outputs a data signal according to the data bits. The clock generator outputs a clock signal to the digital controller. The digital coding circuit is coupled to the digital controller and the port physical layer, and receives the digital data and the clock signal. The digital coding circuit codes the clock signal to generate a plurality of clock bits, and outputs the clock bits to the port physical layer. The port physical layer converts the clock bits into an output clock and outputs the output clock.

Abstract: A terminal circuit and an output stage circuit are provided. The terminal circuit is configured between a transmitter and an external device. The transmitter provides a differential signal to the external circuit. The terminal circuit includes a first to a third switches and a first and a second resistor. The first switch is biased by a first voltage provided by the transmitter. The first and the second resistor receive the differential signal. The second switch is coupled between the first switch and the first resistor. The third switch is coupled between the first switch and the second resistor. The first to the third switches are controlled by a first to a third control signals, respectively. When the transmitter operates in a power-off mode, a voltage level of the first voltage is in ground level, and the first to the third control signals turn off the first to third switches.

Abstract: A terminal circuit and an output stage circuit are provided. The terminal circuit is configured between a transmitter and an external device. The transmitter provides a differential signal to the external circuit. The terminal circuit includes a first to a third switches and a first and a second resistor. The first switch is biased by a first voltage provided by the transmitter. The first and the second resistor receive the differential signal. The second switch is coupled between the first switch and the first resistor. The third switch is coupled between the first switch and the second resistor. The first to the third switches are controlled by a first to a third control signals, respectively. When the transmitter operates in a power-off mode, a voltage level of the first voltage is in ground level, and the first to the third control signals turn off the first to third switches.

Abstract: A packaged circuit including a digital controller, a port physical layer and a digital coding circuit is provided. The digital controller outputs digital data in parallel via a parallel data channel, and the digital data includes a plurality of data bits. The port physical layer includes a clock generator, and outputs a data signal according to the data bits. The clock generator outputs a clock signal to the digital controller. The digital coding circuit is coupled to the digital controller and the port physical layer, and receives the digital data and the clock signal. The digital coding circuit codes the clock signal to generate a plurality of clock bits, and outputs the clock bits to the port physical layer. The port physical layer converts the clock bits into an output clock and outputs the output clock.

Abstract: An electronic device and an integrated circuit thereof are provided. The integrated circuit includes a voltage generator and a current generator with a negative temperature coefficient. The voltage generator generates a reference voltage proportional to an absolute temperature based on a predetermined value. The current generator with the negative temperature coefficient receives the reference voltage and generates a reference current based on the reference voltage.

Abstract: An electronic device and an integrated circuit thereof are provided. The integrated circuit includes a voltage generator and a current generator with a negative temperature coefficient. The voltage generator generates a reference voltage proportional to an absolute temperature based on a predetermined value. The current generator with the negative temperature coefficient receives the reference voltage and generates a reference current based on the reference voltage.