Patents by Inventor Hsu Chiang

Hsu Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250248054
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a conductive layer, a landing pad, a capacitor, and an interlayer contact. The conductive layer has a trench. The landing pad is filled in the trench. The capacitor is disposed over the landing pad. The interlayer contact is connected between the landing pad and the capacitor. A width of a top of the interlayer contact is greater than a width of the capacitor.
    Type: Application
    Filed: January 31, 2024
    Publication date: July 31, 2025
    Inventor: Hsu CHIANG
  • Patent number: 12374631
    Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: July 29, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsu-Chiang Shih, Hung-Yi Lin, Meng-Wei Hsieh, Yu Sheng Chang, Hsiu-Chi Liu, Mark Gerber
  • Publication number: 20250240946
    Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a base structure, a first bit line structure and a second bit line structure. The first bit line structure is buried in the base structure. The second bit line structure is buried in the base structure. A maximum width of the first bit line structure is less than a maximum width of the second bit line structure.
    Type: Application
    Filed: August 8, 2024
    Publication date: July 24, 2025
    Inventor: HSU CHIANG
  • Publication number: 20250240947
    Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a base structure, a first bit line structure buried in the base structure, a second bit line structure buried in the base structure, and a spacer structure positioned in the base structure. The first bit line structure includes a first main portion and a first cap portion over the first main portion. The first cap portion includes a first lower portion over the first main portion and a first upper portion over the first lower portion. The second bit line structure includes a second main portion and a second cap portion over the second main portion. The spacer structure surrounds the first main portion and the first lower portion of the first cap portion. The spacer structure comprises a first air gap.
    Type: Application
    Filed: January 8, 2025
    Publication date: July 24, 2025
    Inventor: HSU CHIANG
  • Publication number: 20250240943
    Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a base structure, a first bit line structure and a second bit line structure. The first bit line structure is buried in the base structure. The second bit line structure is buried in the base structure. A maximum width of the first bit line structure is less than a maximum width of the second bit line structure.
    Type: Application
    Filed: January 24, 2024
    Publication date: July 24, 2025
    Inventor: HSU CHIANG
  • Publication number: 20250240944
    Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a base structure, a first bit line structure and a second bit line structure. The first bit line structure is buried in the base structure. The second bit line structure is buried in the base structure. A maximum width of the first bit line structure is less than a maximum width of the second bit line structure.
    Type: Application
    Filed: February 16, 2024
    Publication date: July 24, 2025
    Inventor: HSU CHIANG
  • Publication number: 20250240948
    Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a base structure, a first bit line structure buried in the base structure, a second bit line structure buried in the base structure, and a spacer structure positioned in the base structure. The first bit line structure includes a first main portion and a first cap portion over the first main portion. The first cap portion includes a first lower portion over the first main portion and a first upper portion over the first lower portion. The second bit line structure includes a second main portion and a second cap portion over the second main portion. The spacer structure surrounds the first main portion and the first lower portion of the first cap portion. The spacer structure includes a first air gap.
    Type: Application
    Filed: February 12, 2025
    Publication date: July 24, 2025
    Inventor: HSU CHIANG
  • Publication number: 20250183197
    Abstract: A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.
    Type: Application
    Filed: February 4, 2025
    Publication date: June 5, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hsu-Chiang SHIH, Hung-Yi LIN, Chien-Mei HUANG
  • Publication number: 20250176245
    Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a base structure, a bit line structure and a spacer. The bit line structure is disposed over the base structure. The spacer is disposed around the bit line structure, and includes a first layer, a second layer and a third layer. The third layer is disposed over the second layer. A width of the third layer is substantially equal to a width of the second layer.
    Type: Application
    Filed: December 14, 2023
    Publication date: May 29, 2025
    Inventor: HSU CHIANG
  • Publication number: 20250176244
    Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a base structure, a bit line structure and a spacer. The bit line structure is disposed over the base structure. The spacer is disposed around the bit line structure, and includes a first layer, a second layer and a third layer. The third layer is disposed over the second layer. A width of the third layer is substantially equal to a width of the second layer.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 29, 2025
    Inventor: HSU CHIANG
  • Patent number: 12218075
    Abstract: A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: February 4, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hsu-Chiang Shih, Hung-Yi Lin, Chien-Mei Huang
  • Publication number: 20250002426
    Abstract: Processes and systems for converting benzene and/or toluene via methylation with methanol and/or dimethyl ether may be performed by contacting an aromatic hydrocarbon feed with a first methylating agent feed in the presence of a methylation catalyst in a series of fixed beds. Between the fixed beds, the product mixture from the upstream bed may be treated by (a) reducing the temperature, (b) adding additional methylating agent feed, (c) optionally removing water, and (d) optionally adding additional aromatic hydrocarbon feed.
    Type: Application
    Filed: September 30, 2022
    Publication date: January 2, 2025
    Inventors: Krystle J. Emanuele, Xiaobo ZHENG, Robert G. TINGER, Ali A. KHEIR, Hsu CHIANG, Seth M. WASHBURN
  • Patent number: 12142843
    Abstract: An electronic device, including a metal back cover, a ground radiator, a third radiator, and a metal frame including a first cutting opening, a second cutting opening, a first radiator located between the first cutting opening and the second cutting opening, and a second radiator located beside the second cutting opening and separated from the first radiator by the second cutting opening, is provided. An end of a first slot formed between the metal back cover and a first part of the first radiator is communicated with the first cutting opening, and a second slot formed between the metal back cover and a second part of the first radiator and between the metal back cover and the second radiator is communicated with the second cutting opening. The ground radiator connects the metal back cover and the first radiator and separates the first slot from the second slot.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: November 12, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Hau Yuen Tan, Chih-Wei Liao, Shih-Keng Huang, Wen-Hgin Chuang, Chia-Hong Chen, Lin-Hsu Chiang, Han-Wei Wang, Chun-Jung Hu
  • Publication number: 20240215151
    Abstract: The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a first redistribution structure and a first encapsulant. The first encapsulant supports the first redistribution structure and is configured to function as a first reinforcement to provide a second redistribution structure. The redistribution structure has a plurality of conductive layers disposed over the first redistribution structure.
    Type: Application
    Filed: December 21, 2022
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Chiang SHIH, Cheng-Yuan KUNG, Hung-Yi LIN, Meng-Wei HSIEH, Chien-Mei HUANG, I-Ting LIN, Sheng-Wen YANG
  • Publication number: 20240195083
    Abstract: An antenna module including a first radiator and a second radiator is provided. The first radiator includes a first segment to a fifth segment connected in sequence. A first slot is formed between the second segment and the fourth segment. The second radiator has an edge. A first retracting distance is between the second segment and an extension line. A second retracting distance is between the fourth segment and the extension line. The first segment resonates at a first high frequency band. The first radiator and the first slot resonate at a low frequency band and a second high frequency band. The first retracting distance, the second retracting distance, the second segment, the fourth segment, the fifth segment and the first slot resonate at a third high frequency band. The first segment and the second radiator resonate at a fourth high frequency band. In addition, an electronic device is provided.
    Type: Application
    Filed: October 17, 2023
    Publication date: June 13, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Shih-Keng Huang, Hau Yuen Tan, Chih-Wei Liao, Chia-Hung Chen, Wen-Hgin Chuang, Chia-Hong Chen, Lin-Hsu Chiang, Hsi Yung Chen
  • Publication number: 20240189772
    Abstract: The present invention provides a method for recycling sulfuric acid from various industries. The recovery system is constructed that it can process spent acid containing H2O2 and recover waste heat to save energy. The heat from the spent acid recovery process is used to generate electric energy, hot water, and chilled water to reduce its energy consumption, operating cost, and carbon emissions. This system can produce electronic-grade and industrial-grade sulfuric acid at the same time and solve the problem of spent acid disposal from various industries.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 13, 2024
    Inventors: Hsu Chiang Fang, Mong-Tung Lee
  • Publication number: 20240079758
    Abstract: An electronic device includes a metal back cover, a metal frame, and a first, second, third, and fourth radiators. The metal frame includes a discrete part and two connection parts. The connection parts are located by two sides of the discrete part, separated from the discrete part, and connected to the metal back cover. A U-shaped slot is formed between the discrete part and the metal back cover and between the discrete part and the connection parts. The first radiator is separated from the discrete part and includes a feed end. The second, third, and fourth radiators are connected to the discrete part and the metal back cover. The third radiator is located between the first and second radiators. The first radiator is located between the third and fourth radiators. The discrete part and the first, second, third, and fourth radiators form an antenna module together.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 7, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Chih-Wei Liao, Hau Yuen Tan, Shih-Keng Huang, Wen-Hgin Chuang, Lin-Hsu Chiang, Chang-Hua Wu, Han-Wei Wang, Chun-Jung Hu
  • Publication number: 20240057274
    Abstract: An electronic device including a metal back cover, a metal frame, a first radiator and a second radiator is provided. The metal frame includes a disconnected part and two connecting parts, the two connecting parts are located at two sides of the disconnected part, separated from the disconnected part and connected to the metal back cover. A U-shaped slot is formed between the disconnected part and the metal back cover, and between the disconnected part and the two connecting parts. The first radiator is located beside the disconnected part and includes a feeding end and a first connecting end away from the feeding end, and the first connecting end is connected to the disconnected part. The second radiator is located beside the disconnected part, and includes a ground end and a second connecting end opposite to each other. The ground end is connected to the metal back cover.
    Type: Application
    Filed: June 1, 2023
    Publication date: February 15, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Hau Yuen Tan, Chih-Wei Liao, Shih-Keng Huang, Wen-Hgin Chuang, Chia-Hong Chen, Lin-Hsu Chiang, Cheng-Kuan Lin, His-Yung Chen
  • Publication number: 20230420395
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first electronic component and a second electronic component. The first electronic component is configured to receive a radio frequency (RF) signal and amplify a power of the RF signal. The second electronic component is disposed under the first electronic component. The second electronic component includes an interconnection structure passing through the second electronic component. The interconnection structure is configured to provide a path for a transmission of the RF signal.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Cheng LIN, Hung-Yi LIN, Cheng-Yuan KUNG, Hsu-Chiang SHIH, Cheng-Yu HO
  • Publication number: 20230402767
    Abstract: An electronic device, including a metal back cover, a ground radiator, a third radiator, and a metal frame including a first cutting opening, a second cutting opening, a first radiator located between the first cutting opening and the second cutting opening, and a second radiator located beside the second cutting opening and separated from the first radiator by the second cutting opening, is provided. An end of a first slot formed between the metal back cover and a first part of the first radiator is communicated with the first cutting opening, and a second slot formed between the metal back cover and a second part of the first radiator and between the metal back cover and the second radiator is communicated with the second cutting opening. The ground radiator connects the metal back cover and the first radiator and separates the first slot from the second slot.
    Type: Application
    Filed: February 23, 2023
    Publication date: December 14, 2023
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Hau Yuen Tan, Chih-Wei Liao, Shih-Keng Huang, Wen-Hgin Chuang, Chia-Hong Chen, Lin-Hsu Chiang, Han-Wei Wang, Chun-Jung Hu